Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

LC4128ZC-75M132C Arkusz danych(PDF) 8 Page - Lattice Semiconductor

Numer części LC4128ZC-75M132C
Szczegółowy opis  3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
Download  99 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  LATTICE [Lattice Semiconductor]
Strona internetowa  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

LC4128ZC-75M132C Arkusz danych(HTML) 8 Page - Lattice Semiconductor

Back Button LC4128ZC-75M132C Datasheet HTML 4Page - Lattice Semiconductor LC4128ZC-75M132C Datasheet HTML 5Page - Lattice Semiconductor LC4128ZC-75M132C Datasheet HTML 6Page - Lattice Semiconductor LC4128ZC-75M132C Datasheet HTML 7Page - Lattice Semiconductor LC4128ZC-75M132C Datasheet HTML 8Page - Lattice Semiconductor LC4128ZC-75M132C Datasheet HTML 9Page - Lattice Semiconductor LC4128ZC-75M132C Datasheet HTML 10Page - Lattice Semiconductor LC4128ZC-75M132C Datasheet HTML 11Page - Lattice Semiconductor LC4128ZC-75M132C Datasheet HTML 12Page - Lattice Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 99 page
background image
Lattice Semiconductor
ispMACH 4000V/B/C/Z Family Data Sheet
8
• Block CLK2
• Block CLK3
• PT Clock
• PT Clock Inverted
• Shared PT Clock
• Ground
Clock Enable Multiplexer
Each macrocell has a 4:1 clock enable multiplexer. This allows the clock enable signal to be selected from the fol-
lowing four sources:
• PT Initialization/CE
• PT Initialization/CE Inverted
• Shared PT Clock
• Logic High
Initialization Control
The ispMACH 4000 family architecture accommodates both block-level and macrocell-level set and reset capability.
There is one block-level initialization term that is distributed to all macrocell registers in a GLB. At the macrocell
level, two product terms can be “stolen” from the cluster associated with a macrocell to be used for set/reset func-
tionality. A reset/preset swapping feature in each macrocell allows for reset and preset to be exchanged, providing
flexibility.
Note that the reset/preset swapping selection feature affects power-up reset as well. All flip-flops power up to a
known state for predictable system initialization. If a macrocell is configured to SET on a signal from the block-level
initialization, then that macrocell will be SET during device power-up. If a macrocell is configured to RESET on a
signal from the block-level initialization or is not configured for set/reset, then that macrocell will RESET on power-
up. To guarantee initialization values, the VCC rise must be monotonic, and the clock must be inactive until the reset
delay time has elapsed.
GLB Clock Generator
Each ispMACH 4000 device has up to four clock pins that are also routed to the GRP to be used as inputs. These
pins drive a clock generator in each GLB, as shown in Figure 6. The clock generator provides four clock signals that
can be used anywhere in the GLB. These four GLB clock signals can consist of a number of combinations of the
true and complement edges of the global clock signals.
Figure 6. GLB Clock Generator
CLK0
CLK1
CLK2
CLK3
Block CLK0
Block CLK1
Block CLK2
Block CLK3


Podobny numer części - LC4128ZC-75M132C

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Lattice Semiconductor
LC4128ZC-75M132C1 LATTICE-LC4128ZC-75M132C1 Datasheet
851Kb / 91P
   3.3V/2.5V/1.8V In-System Programmable SuperFAST High density PDLs
More results

Podobny opis - LC4128ZC-75M132C

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Lattice Semiconductor
LC4032C LATTICE-LC4032C Datasheet
483Kb / 74P
   3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LA-ISPMACH4000V LATTICE-LA-ISPMACH4000V Datasheet
240Kb / 42P
   3.3V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4512Z LATTICE-LC4512Z Datasheet
851Kb / 91P
   3.3V/2.5V/1.8V In-System Programmable SuperFAST High density PDLs
2096VL LATTICE-2096VL Datasheet
142Kb / 11P
   2.5V In-System Programmable SuperFAST??High Density PLD
2032VL LATTICE-2032VL Datasheet
156Kb / 12P
   2.5V In-System Programmable SuperFAST??High Density PLD
2128VL LATTICE-2128VL Datasheet
214Kb / 17P
   2.5V In-System Programmable SuperFAST??High Density PLD
2064VL LATTICE-2064VL Datasheet
188Kb / 14P
   2.5V In-System Programmable SuperFAST??High Density PLD
2192VL LATTICE-2192VL Datasheet
164Kb / 13P
   2.5V In-System Programmable SuperFAST??High Density PLD
2096VE LATTICE-2096VE Datasheet
160Kb / 12P
   3.3V In-System Programmable SuperFAST??High Density PLD
2128VE LATTICE-2128VE Datasheet
234Kb / 19P
   3.3V In-System Programmable SuperFAST??High Density PLD
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99


Arkusz danych Pobierz

Go To PDF Page


Link URL




Polityka prywatności
ALLDATASHEET.PL
Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com