Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

AD7190 Arkusz danych(PDF) 4 Page - Analog Devices

Numer części AD7190
Szczegółowy opis  4.8 kHz Ultra-Low Noise 24-Bit Sigma-Delta ADC with PGA
Download  21 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD7190 Arkusz danych(HTML) 4 Page - Analog Devices

  AD7190 Datasheet HTML 1Page - Analog Devices AD7190 Datasheet HTML 2Page - Analog Devices AD7190 Datasheet HTML 3Page - Analog Devices AD7190 Datasheet HTML 4Page - Analog Devices AD7190 Datasheet HTML 5Page - Analog Devices AD7190 Datasheet HTML 6Page - Analog Devices AD7190 Datasheet HTML 7Page - Analog Devices AD7190 Datasheet HTML 8Page - Analog Devices AD7190 Datasheet HTML 9Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 21 page
background image
AD7190
Preliminary Technical Data
Rev.PrD 7/08 | Page 4
Parameter1
AD7190B
Unit
Test Conditions/Comments
VOL, Output Low Voltage2
0.4
V max
DVDD = 5 V, ISINK = 1.6 mA
Floating-State Leakage Current
±10
µA max
Floating-State Output Capacitance
10
pF typ
Data Output Coding
Offset binary
SYSTEM CALIBRATION2
Full-Scale Calibration Limit
1.05 × FS
V max
Zero-Scale Calibration Limit
−1.05 × FS
V min
Input Span
0.8 × FS
V min
2.1 × FS
V max
POWER REQUIREMENTS7
Power Supply Voltage
AVDD
− AGND
3/5.25
V min/max
DVDD
− DGND
2.7/5.25
V min/max
Power Supply Currents
AIDD Current
TBD
mA max
Gain = 1, Buffer off
TBD
mA max
Gain = 8, Buffer off
TBD
mA max
Gain = 8, Buffer on
TBD
mA max
Gain = 16 – 128, Buffer off
TBD
mA max
Gain = 16 – 128, Buffer on
DIDD Current
TBD
mA max
DVDD = 3 V
1
mA max
DVDD = 5 V
IDD (Power-Down Mode)
1
µA max
1 Temperature range: −40°C to +105°C.
2 Specification is not production tested but is supported by characterization data at initial product release.
3 Following a calibration, this error will be in the order of the noise for the programmed gain and update rate selected.
4 Recalibration at any temperature will remove these errors.
5 Full-scale error applies to both positive and negative full-scale and applies at the factory calibration conditions (AVDD = 5 V, gain = 1, TA = 25
°C).
6 REJ60 is a bit in the Mode Register. When the update rate is set to 50 Hz, setting REJ60 to ‘1’ places a notch at 60 Hz, allowing simultaneous 50 Hz/60 Hz rejection.
7 Digital inputs equal to DVDD or GND.


Podobny numer części - AD7190

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
AD7190 AD-AD7190 Datasheet
679Kb / 41P
   4.8 kHz Ultralow Noise 24-Bit Sigma-Delta ADC
AD7190BRUZ AD-AD7190BRUZ Datasheet
749Kb / 40P
   4.8 kHz Ultralow Noise 24-Bit Sigma-Delta ADC with PGA
REV. 0
AD7190BRUZ AD-AD7190BRUZ Datasheet
679Kb / 41P
   4.8 kHz Ultralow Noise 24-Bit Sigma-Delta ADC
AD7190BRUZ-REEL AD-AD7190BRUZ-REEL Datasheet
749Kb / 40P
   4.8 kHz Ultralow Noise 24-Bit Sigma-Delta ADC with PGA
REV. 0
AD7190BRUZ-REEL AD-AD7190BRUZ-REEL Datasheet
679Kb / 41P
   4.8 kHz Ultralow Noise 24-Bit Sigma-Delta ADC
More results

Podobny opis - AD7190

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
AD7190 AD-AD7190_08 Datasheet
749Kb / 40P
   4.8 kHz Ultralow Noise 24-Bit Sigma-Delta ADC with PGA
REV. 0
AD7192 AD-AD7192 Datasheet
711Kb / 40P
   4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA
REV. A
AD7193 AD-AD7193 Datasheet
767Kb / 56P
   4-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA
REV. A
AD7194 AD-AD7194 Datasheet
1,002Kb / 56P
   8-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA
REV. 0
AD7195 AD-AD7195_15 Datasheet
546Kb / 45P
   4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA and AC Excitation
AD7190 AD-AD7190_17 Datasheet
679Kb / 41P
   4.8 kHz Ultralow Noise 24-Bit Sigma-Delta ADC
AD7195 AD-AD7195 Datasheet
662Kb / 44P
   4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA and AC Excitation
REV. 0
AD7193 AD-AD7193_17 Datasheet
1Mb / 57P
   24-Bit Sigma-Delta ADC with PGA
AD7194 AD-AD7194_17 Datasheet
1Mb / 55P
   24-Bit Sigma-Delta ADC with PGA
logo
Intersil Corporation
ISL26102AVZ INTERSIL-ISL26102AVZ Datasheet
909Kb / 21P
   Low-Noise 24-bit Delta Sigma ADC
October 12, 2012
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21


Arkusz danych Pobierz

Go To PDF Page


Link URL




Polityka prywatności
ALLDATASHEET.PL
Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com