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MC33063A Arkusz danych(PDF) 5 Page - Fairchild Semiconductor |
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MC33063A Arkusz danych(HTML) 5 Page - Fairchild Semiconductor |
5 / 7 page © 2001 Fairchild Semiconductor Corporation www.fairchildsemi.com MC34063A/MC33063A • Rev. 1.0.3 5 Physical Dimensions C 7° TYP 7° TYP .430 MAX [10.92] B A .400 .373 [10.15 9.46 ] .250±.005 [6.35±0.13] .036 [0.9 TYP] .070 .045 [1.78 1.14 ] .100 [2.54] .300 [7.62] .060 MAX [1.52] .310±.010 [7.87±0.25] .130±.005 [3.3±0.13] .210 MAX [5.33] .140 .125 [ 3.55 3.17 ] .015 MIN [0.38] .021 .015 [0.53 0.37 ] .010 +.005 -.000 [0.254+0.127 -0.000 ] PIN #1 PIN #1 (.032) [R0.813] (.092) [Ø2.337] TOP VIEW OPTION 1 TOP VIEW OPTION 2 .001[.025] C N08EREVG C. DOES NOT INCLUDE MOLD FLASH OR PROTRUSIONS. DAMBAR PROTRUSIONS SHALL NOT EXCEED D. DOES NOT INCLUDE DAMBAR PROTRUSIONS. B. CONTROLING DIMENSIONS ARE IN INCHES A. CONFORMS TO JEDEC REGISTRATION MS-001, MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED VARIATIONS BA E. DIMENSIONING AND TOLERANCING NOTES: REFERENCE DIMENSIONS ARE IN MILLIMETERS .010 INCHES OR 0.25MM. .010 INCHES OR 0.25MM. PER ASME Y14.5M-1994. Figure 4. 8-Lead PDIP, JEDEC MS-001 Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. |
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