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TEA7088A Arkusz danych(PDF) 10 Page - STMicroelectronics

Numer części TEA7088A
Szczegółowy opis  LOW-RANGE PHONE DEDICATED CHIP
Download  17 Pages
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

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The Start Up Conditions of the TEA7088A
As soon as RESET is high and before sending any
code the circuit is in the following default configu-
ration :
- Speech
- No mask
- AGC ON in transmit and receive channels
- Normal gain on receive channel
- 1.79MHz input clock (oscillator in stand by)
6 bit Codes
Between two DTMF or ring frequencies, introduc-
ing a Mute or speech code implies to wait 1ms to
end the sinewave or square period.
DTMF Dialing
To dial in DTMF the following sequence of codes
must be sent :
DTMF Frequency code : 00XXXX
Dialing Mode code
: 010001
Mute or SPEECH code : 010010 or 010000
The duration of the DTMF signal is fixed by the
delay between Dialing mode code and MUTE or
SPEECH code.
Pulse Dialing
The pulse dialing function is performed by the
microcontroller through the high voltage stage.
The ”MAKE” voltage over the TEA7088A during
dialing can be reduced by sending the mask code
0010101. To recover the normal speech voltage at
the end of dialing the mask code must be sent
again.
If the mask code is not used the voltage over the
TEA7088A during dialing is the same as in speech
mode.
Ring Indicator (RI)
In ring mode TEA7088A generates a high logic
level on Pin RI as soon as the voltage on Pin VRING
is higher than VTHRI ON (19V Typ.), and the voltage
on VRMC is higher than 3.4V.
When the voltage on VRMC becomes higher than
2.6V, RESET signal becomes also high.
Mask Input (MSK)
MSK input must be high by default (Figure 10).
In speech configuration forcing MSK input to low
level will have same functionality than the MASK
code.
For ring mode when it is necessary to send other
frequencies than the 8 basic ones, this input allows
to drive the buzzer output.
MICROCONTROLLER INTERFACE WITH TEA7088A (continued)
a 0
a1
a 2
a3
a4
a 5
a6
t1
t2
t4
t5
CLK Data
Data
Synchro
Datas with a Change During CLK = 1
t3
t3
t0
t0, t1, t2, t3, t4, t5 > 1
µs
Figure 9 : DATA/CLOCK Timing
I
L
MSK
P ULSE MODE
OTHER MODES
OTHER MODES
FLASH MODE
Figure 10 : MASK Timing
TEA7088A
10/17


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