U1AFS1500-FG256 datasheet(11/27 Pages) ACTEL

Numer części	U1AFS1500-FG256

Szczegółowy opis	3 - DC and Power Characteristics

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Producent	ACTEL [Actel Corporation]

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Actel Fusion Mixed-Signal FPGA for the MicroBlade AdvancedMC Solution

Pr el iminar y v0 .4

3-11

Power per I/O Pin

Table 3-9 •

Summary of I/O Input Buffer Power (per pin)—Default I/O Software Settings

VCCI (V)

Static Power

PDC7 (mW)

1

Dynamic Power

PAC9 (µW/MHz)

2

Applicable to Pro I/O Banks

Single-Ended

3.3 V LVTTL/LVCMOS

3.3

–

17.39

3.3 V LVTTL/LVCMOS – Schmitt trigger

3.3

–

25.51

2.5 V LVCMOS

2.5

–

5.76

2.5 V LVCMOS – Schmitt trigger

2.5

–

7.16

1.8 V LVCMOS

1.8

–

2.72

1.8 V LVCMOS – Schmitt trigger

1.8

–

2.80

1.5 V LVCMOS (JESD8-11)

1.5

–

2.08

1.5 V LVCMOS (JESD8-11) – Schmitt trigger

1.5

–

2.00

3.3 V PCI

3.3

–

18.82

3.3 V PCI – Schmitt trigger

3.3

–

20.12

3.3 V PCI-X

3.3

–

18.82

3.3 V PCI-X – Schmitt trigger

3.3

–

20.12

Voltage-Referenced

3.3 V GTL

3.3

2.90

8.23

2.5 V GTL

2.5

2.13

4.78

3.3 V GTL+

3.3

2.81

4.14

2.5 V GTL+

2.5

2.57

3.71

HSTL (I)

1.5

0.17

2.03

HSTL (II)

1.5

0.17

2.03

SSTL2 (I)

2.5

1.38

4.48

SSTL2 (II)

2.5

1.38

4.48

SSTL3 (I)

3.3

3.21

9.26

SSTL3 (II)

3.3

3.21

9.26

Differential

LVDS

2.5

2.26

1.50

LVPECL

3.3

5.71

2.17

Notes:

1. PDC7 is the static power (where applicable) measured on VCCI.

2. PAC9 is the total dynamic power measured on VCC and VCCI.

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