74AC11244

OCTAL BUFFER/DRIVER

WITH 3-STATE OUTPUTS

SCAS171B – MARCH 1987 – REVISED SEPTEMBER 1998

1

POST OFFICE BOX 655303

CMOS ) 1-

µm Process

Memory Address Registers

Layout

Configurations Minimize High-Speed

Switching Noise

125

°C

Small-Outline (DW), Shrink Small-Outline

(DB), and Thin Shrink Small-Outline (PW)

Packages, and Standard Plastic DIPs (NT)

description

The 74AC11244 is an octal buffer or line driver designed specifically to improve both the performance and

density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The

device can be used as two 4-bit buffers or one 8-bit buffer, with active-low output-enable (OE) inputs.

When OE is low, the device passes noninverted data from the A inputs to the Y outputs. When OE is high, the

outputs are in the high-impedance state.

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The 74AC11244 is characterized for operation from –40

°C to 85°C.

FUNCTION TABLE

(each driver)

INPUTS

OUTPUT

OE

A

Y

L

H

H

L

LL

H

X

Z

Copyright

© 1998, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

1Y1

1Y2

1Y3

1Y4

GND

GND

GND

GND

2Y1

2Y2

2Y3

2Y4

1OE

1A1

1A2

1A3

1A4

2A1

2A2

2A3

2A4

2OE

DB, DW, NT, OR PW PACKAGE

(TOP VIEW)