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74ALVTH16374GRE4 Arkusz danych(PDF) 2 Page - Texas Instruments

Numer części 74ALVTH16374GRE4
Szczegółowy opis  2.5-V/3.3-V 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
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74ALVTH16374GRE4 Arkusz danych(HTML) 2 Page - Texas Instruments

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SN54ALVTH16374, SN74ALVTH16374
2.5-V/3.3-V 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCES068F – JUNE 1996 – REVISED JANUARY 1999
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus
lines without need for interface or pullup components.
OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
When VCC is between 0 and 1.2 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.2 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ALVTH16374 is characterized for operation over the full military temperature range of –55
°C to
125
°C. The SN74ALVTH16374 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each 8-bit section)
INPUTS
OUTPUT
OE
CLK
D
Q
L
H
H
L
LL
L
H or L
X
Q0
H
X
X
Z


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