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SN74ACT7808PM Arkusz danych(PDF) 5 Page - Texas Instruments

Numer części SN74ACT7808PM
Szczegółowy opis  2048 횞 9 STROBED FIRST-IN, FIRST-OUT MEMORY
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SN74ACT7808PM Arkusz danych(HTML) 5 Page - Texas Instruments

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SN74ACT7808
2048
× 9 STROBED FIRST-IN, FIRST-OUT MEMORY
SCAS205D – FEBRUARY 1991 – REVISED APRIL 1998
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
NAME
I/O
DESCRIPTION
AF/AE
O
Almost-full/almost-empty flag. Depth-offset values can be programmed for AF/AE or the default value of 256 can be
used for both the almost-empty offset (X) and the almost-full offset (Y). AF/AE is high when memory contains X or fewer
words or (2048 – Y) or more words. AF/AE is high after reset.
CASEN†
I
Cascade enable. When multiple SN74ACT7808 devices are depth cascaded, every device must have CASEN tied low.
CASEN must be tied high when a device is not used in depth expansion.
D0–D8
I
Nine-bit data input port
DP9
I
DP9 is used as the most significant bit when programming the AF/AE offset values.
EMPTY
O
Empty flag. EMPTY is low when the FIFO memory is empty. A FIFO reset also causes EMPTY to go low.
FL†
I
First load. When multiple SN74ACT7808 devices are depth cascaded, the first device in the chain must have its FL
input tied low and all other devices must have their FL inputs tied high.
FULL
O
Full flag. FULL is low when the FIFO is full. A FIFO reset causes FULL to go high.
HF
O
Half-full flag. HF is high when the FIFO memory contains 1024 or more words. HF is low after reset.
LDCK
I
Load clock. Data is written to the FIFO on the rising edge of LDCK when FULL is high.
OE
I
Output enable. When OE is low, D0–D8 are in the high-impedance state.
PEN
I
Program enable. After reset and before the first word is written to the FIFO, the binary value on D0–D8 and DP9 is
latched as an AF/AE offset value when PEN is low and LDCK is high.
Q0–Q8
O
Nine-bit data output port
RESET
I
Reset. A low level on RESET resets the FIFO and drives FULL and AF/AE high and HF and EMPTY low.
UNCK
I
Unload clock. Data is read from the FIFO on the rising edge of UNCK when EMPTY is high.
XI†
I
Expansion input (XI) and expansion output (XO). When multiple SN74ACT7808 devices are depth cascaded, the XO
of one device must be connected to the XI of the next device in the chain The XO of the last device in the chain is
XO†
O
of one device must be connected to the XI of the next device in the chain. The XO of the last device in the chain is
connected to the XI of the first device in the chain.
† See Figures 6 and 7 for application information on FIFO word-width and word-depth expansions, respectively.


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