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AD7193BRUZ-REEL Arkusz danych(PDF) 1 Page - Analog Devices |
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AD7193BRUZ-REEL Arkusz danych(HTML) 1 Page - Analog Devices |
1 / 56 page 4-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA AD7193 Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved. MCLK1 MCLK2 P0/REFIN2(–) P1/REFIN2(+) DVDD DGND REFIN1(+) REFIN1(–) AIN1 AIN2 AIN3 AIN4 AINCOM BPDSW AGND AD7193 FEATURES Fast settling filter option 4 differential/8 pseudo differential input channels RMS noise: 11 nV @ 4.7 Hz (gain = 128) 15.5 noise-free bits @ 2.4 kHz (gain = 128) Up to 22 noise-free bits (gain = 1) Offset drift: ±5 nV/°C Gain drift: ±1 ppm/°C Specified drift over time Automatic channel sequencer Programmable gain (1 to 128) Output data rate: 4.7 Hz to 4.8 kHz Internal or external clock Simultaneous 50 Hz/60 Hz rejection 4 general-purpose digital outputs Power supply AVDD: 3 V to 5.25 V DVDD: 2.7 V to 5.25 V Current: 4.65 mA Temperature range: −40°C to +105°C Package: 28-lead TSSOP Interface 3-wire serial SPI, QSPI™, MICROWIRE™, and DSP compatible Schmitt trigger on SCLK APPLICATIONS PLC/DCS analog input modules Data acquisition Strain gage transducers Pressure measurement Temperature measurement Flow measurement Weigh scales Chromatography Medical and scientific instrumentation GENERAL DESCRIPTION The AD7193 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can interface directly to the ADC. The device can be configured to have four differential inputs or eight pseudo differential inputs. The on-chip channel sequencer allows several channels to be enabled simultaneously, and the AD7193 sequentially converts on each enabled channel. This simplifies communication with the part. The on-chip 4.92 MHz clock can be used as the clock source to the ADC or, alternatively, an external clock or crystal can be used. The output data rate from the part can be varied from 4.7 Hz to 4.8 kHz. The device has a very flexible digital filter, including a fast settling option. Variables such as output data rate and settling time are dependent on the option selected. For applications that require all conversions to be settled, the AD7193 includes zero latency. The part operates with a power supply from 3 V to 5.25 V. It consumes a current of 4.65 mA and it is housed in a 28-lead TSSOP package. FUNCTIONAL BLOCK DIAGRAM SERIAL INTERFACE AND CONTROL LOGIC TEMP SENSOR CLOCK CIRCUITRY AVDD AGND DOUT/RDY DIN SCLK CS SYNC P3 P2 AIN5 AIN6 AIN7 AIN8 Σ-Δ ADC PGA MUX Figure 1. |
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