 |
Zakładka z wyszukiwarką danych komponentów |
|
|
Zakładka z wyszukiwarką danych komponentów |
|
FIN210ACMLX Arkusz danych(PDF) 7 Page - Fairchild Semiconductor |
|
||||||||||||||||||||||||||||||
FIN210ACMLX Arkusz danych(HTML) 7 Page - Fairchild Semiconductor |
|
|
7 / 17 page  © 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FIN210AC • Rev. 1.0.1 7 Application Diagrams The following application diagrams illustrate the most typical applications for the FIN210 device. Specific configurations of the control pins may vary based on the needs of a given system. The following recommendations are valid for all of the applications shown. CKREF STROBE CKP DP[8:1] DP[9] DP[10] DIRI PLL1 PLL0 CTL_ADJ S1 S0 CKSO+ CKSO- DSO+ DSO- CKSI- CKSI+ /DIRO VDDP VDDS/A Baseband Processor GND VDDP1 VDDP1 FIN210AC Serializer PIXEL CLK Data[7:0] HSYNC VSYNC /RES CKP CKREF STROBE DP[8:1] DP[9] DP[10] XTRM DIRI PWS1 PWS0 S1 S0 CKSI+ CKSI- DSI+ DSI- CKSO- CKSO+ /DIRO VDDS/A VDDP GND VDDP2 VDD LCD MODULE PIXEL CLK Data[7:0] HSYNC VSYNC /RES A6 B5 C1 B3:E1 E2 F1 F6 G3 G4 A4 G5 G6 NC C5 C6 D6 D5 E6 E5 B6 E5 E6 D5 D6 C6 C5 B6 NC NC NC NC NC NC A3 F6 G3 G4 G5 G6 C1 A6 B5 D3 E4 F4 E4 F4 D3 FIN210AC Deserializer B3:E1 E2 F1 /ENZ A4 Figure 4. 8-Bit RGB Application (Example Shows BGA 42-Pin Package) Serializer Configuration: 10MHz to 30MHz Frequency Range (S1=S0=1) Normal Mode (PLL1=0; PLL0=1) Deserializer Configuration: ~4 – 5ns output edge rates (S1=S0=1) ~50% CKP PW,(PWS1=PWS0=0) CKREF STROBE CKP DP[8:1] DP[9] DP[10] DIRI PWS1 PWS0 XTRM S1 S0 CKSO+ CKSO- DSI+ DSI- CKSI- CKSI+ /DIRO VDDP VDDS/A Baseban d Processor GND VDDP1 FIN210AC Dese rializer MASTER CLK PIXEL CLK YUV[7:0] HSYNC VSYNC /RES CKP CKREF STROBE DP[8:1] DP[9] DP[10] DIRI PLL1 PLL0 CTL_ADJ S1 S0 CKSI+ CKSI- DSO+ DSO- CKSO- CKSO+ /DIRO VDDS/A VDDP GND VDDP2 VDD Camera Module MASTER CLK PIXEL CLK YUV[7:0] HSYNC VSYNC /RES A6 B5 C1 F6 G3 G4 A3 G5 G6 C5 C6 D5 D6 E6 E5 B6 E5 E6 D6 D5 C6 C5 B6 NC NC F6 G3 G4 A4 G5 G6 C1 A6 B5 D3 E4 F4 E4 F4 D3 FIN210AC Serializer VDDP2 B3:E1 E2 F1 B3:E1 E2 F1 /ENZ A4 Figure 5. 8-Bit YUV 1.3MPixel CMOS Imager (Example Shows BGA 42-Pin Package) Deserializer Configuration: ~2 – 3ns output edge rates (S1=0, S0=1) ~50% CKP PW,(PWS1=PWS0=0) Serializer Configuration: 18MHz to 48MHz Frequency Range (S1=0, S0=1) Normal Mode (PLL1=0, PLL0=1) |
Podobny numer części - FIN210ACMLX |
|
Podobny opis - FIN210ACMLX |
|
|
|
Link URL |
| Polityka prywatności |
| ALLDATASHEET.PL |
| Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Polish ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
