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AD9122 Arkusz danych(PDF) 8 Page - Analog Devices |
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AD9122 Arkusz danych(HTML) 8 Page - Analog Devices |
8 / 56 page AD9122 Rev. 0 | Page 8 of 56 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 CVDD18 DACCLKP DACCLKN CVSS FRAMEP FRAMEN IRQ D15P D15N NC IOVDD DVDD18 D14P D14N D13P D13N 17 D12P 18 D12N 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 RESET CS SCLK SDIO SDO DVDD18 D0N D0P D1N D1P DVSS DVDD18 D2N D2P D3N D3P D4N D4P PIN 1 INDICATOR AD9122 TOP VIEW (Not to Scale) NOTES 1. NC = NO CONNECT. 2. EXPOSED PAD MUST BE CONNECTED TO AVSS. Figure 3. Pin Configuration Table 8. Pin Function Descriptions Pin No. Mnemonic Description 1 CVDD18 1.8 V Clock Supply. Supplies clock receivers, clock distribution, and PLL circuitry. 2 DACCLKP DAC Clock Input, Positive. 3 DACCLKN DAC Clock Input, Negative. 4 CVSS Clock Supply Common. 5 FRAMEP Frame Input, Positive. 6 FRAMEN Frame Input, Negative. 7 IRQ Interrupt Request. Open-drain, active low output. 8 D15P Data Bit 15 (MSB), Positive. 9 D15N Data Bit 15 (MSB), Negative. 10 NC No connection to device. 11 IOVDD Supply Pin for Serial Ports, RESET and IRQ. 1.8 V to 2.8 V can be supplied to this pin. 12 DVDD18 1.8 V Digital Supply. Supplies power to digital core and digital data ports. 13 D14P Data Bit 14, Positive. 14 D14N Data Bit 14, Negative. 15 D13P Data Bit 13, Positive. 16 D13N Data Bit 13, Negative. 17 D12P Data Bit 12, Positive. 18 D12N Data Bit 12, Negative. 19 D11P Data Bit 11, Positive. 20 D11N Data Bit 11, Negative. 21 D10P Data Bit 10, Positive. 22 D10N Data Bit 10, Negative. 23 D9P Data Bit 9, Positive. 24 D9N Data Bit 9, Negative. 25 D8P Data Bit 8, Positive. 26 D8N Data Bit 8, Negative. |
Podobny numer części - AD9122 |
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Podobny opis - AD9122 |
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