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AD9122-M5375-EBZ Arkusz danych(PDF) 9 Page - Analog Devices

Numer części AD9122-M5375-EBZ
Szczegółowy opis  Dual, 16-Bit, 1200 MSPS, TxDAC짰 Digital-to-Analog Converter
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD9122-M5375-EBZ Arkusz danych(HTML) 9 Page - Analog Devices

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AD9122
Rev. 0 | Page 9 of 56
Pin No.
Mnemonic
Description
27
DCIP
Data Clock Input, Positive.
28
DCIN
Data Clock Input, Negative.
29
DVDD18
1.8 V Digital Supply.
30
DVSS
Digital Common.
31
D7P
Data Bit 7, Positive.
32
D7N
Data Bit 7, Negative.
33
D6P
Data Bit 6, Positive.
34
D6N
Data Bit 6, Negative.
35
D5P
Data Bit 5, Positive.
36
D5N
Data Bit 5, Negative.
37
D4P
Data Bit 4, Positive.
38
D4N
Data Bit 4, Negative.
39
D3P
Data Bit 3, Positive.
40
D3N
Data Bit 3, Negative.
41
D2P
Data Bit 2, Positive.
42
D2N
Data Bit 2, Negative.
43
DVDD18
1.8 V Digital Supply.
44
DVSS
Digital Common.
45
D1P
Data Bit 1, Positive.
46
D1N
Data Bit 1, Negative.
47
D0P
Data Bit 0, Positive.
48
D0N
Data Bit 0, Negative.
49
DVDD18
1.8 V Digital Supply.
50
SDO
Serial Port Data Output (CMOS Levels with Respect to IOVDD).
51
SDIO
Serial Port Data Input/Output (CMOS Levels with Respect to IOVDD).
52
SCLK
Serial Port Clock Input (CMOS Levels With Respect to IOVDD).
53
CS
Serial Port Chip Select. Active Low (CMOS Levels With Respect to IOVDD).
54
RESET
Reset. Active Low (CMOS Levels With Respect to IOVDD).
55
NC
No connection to device.
56
AVSS
Analog Supply Common.
57
AVDD33
3.3 V Analog Supply.
58
IOUT2P
Q DAC Positive Current Output.
59
IOUT2N
Q DAC Negative Current Output.
60
AVDD33
3.3 V Analog Supply.
61
AVSS
Analog Supply Common.
62
REFIO
Voltage Reference. Nominally 1.2 V output. Should be decoupled to analog common.
63
FSADJ
Full-Scale Current Output Adjust. Place a 10 kΩ resistor on the analog common.
64
AVSS
Analog Common.
65
AVDD33
3.3 V Analog Supply.
66
IOUT1N
I DAC Positive Current Output.
67
IOUT1P
I DAC Negative Current Output.
68
AVDD33
3.3 V Analog Supply.
69
REFCLKN
PLL Reference Clock Input, Negative. This pin has secondary function as SYNC input.
70
REFCLKP
PLL Reference Clock Input, Positive. This pin has secondary function as SYNC input.
71
CVDD18
1.8 V Clock Supply. Supplies clock receivers, clock distribution, and PLL circuitry.
72
CVDD18
1.8 V Clock Supply. Supplies clock receivers, clock distribution, and PLL circuitry.
EPAD
Exposed pad must be connected to AVSS. This provides an electrical, thermal, and mechanical connection
to the PCB.


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