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74HCT9046AD Arkusz danych(PDF) 8 Page - NXP Semiconductors

Numer części 74HCT9046AD
Szczegółowy opis  PLL with band gap controlled VCO
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Logo NXP - NXP Semiconductors

74HCT9046AD Arkusz danych(HTML) 8 Page - NXP Semiconductors

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74HCT9046A_6
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 06 — 15 September 2009
8 of 43
NXP Semiconductors
74HCT9046A
PLL with band gap controlled VCO
waveforms for the PC1 loop locked at f0 are shown in Figure 7. This figure also shows the
actual waveforms across the VCO capacitor at pins C1A and C1B (VC1A and VC1B) to
show the relation between these ramps and the VCO_OUT voltage.
The frequency capture range (2f0) is defined as the frequency range of input signals on
which the PLL will lock if it was initially out-of-lock. The frequency lock range (2fL) is
defined as the frequency range of the input signals on which the loop will stay locked if it
was initially in lock. The capture range is smaller or equal to the lock range.
With PC1, the capture range depends on the low-pass filter characteristics and can be
made as large as the lock range. This configuration remains locked even with very noisy
input signals. Typical behavior of this type of phase comparator is that it may lock to input
frequencies close to the harmonics of the VCO center frequency.
Fig 6.
Phase comparator 1; average output voltage as a function of input phase
difference
mbd101
180 o
0 o
90 o
0.5VCC
0
VCC
VDEM_OUT(AV)
ΦPC_IN
V
DEM _OUT
V
PCI _OUT
V
CC
π
-----------
Φ
SIG_IN
Φ
COMP_IN
==
Φ
PC _IN
Φ
SIG_IN
Φ
COMP_IN
()
=


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