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74LV132D Arkusz danych(PDF) 8 Page - NXP Semiconductors |
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74LV132D Arkusz danych(HTML) 8 Page - NXP Semiconductors |
8 / 17 page 74LV132_5 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 2 July 2009 8 of 17 NXP Semiconductors 74LV132 Quad 2-input NAND Schmitt trigger [1] All typical values are measured at Tamb =25 °C. 14. Waveforms transfer characteristics VT− negative-going threshold voltage see Figure 6 VCC = 1.2 V - 0.34 - - - V VCC = 2.0 V 0.3 0.65 0.9 0.3 0.9 V VCC = 2.7 V 0.4 0.90 1.4 0.4 1.4 V VCC = 3.0 V 0.6 1.05 1.5 0.6 1.5 V VCC = 3.6 V 0.8 1.30 1.8 0.8 1.8 V VCC = 4.5 V 0.9 1.60 2.0 0.9 2.0 V VCC = 5.5 V 1.2 2.00 2.6 1.2 2.6 V VH hysteresis voltage (VT+ − VT−); see Figure 6 VCC = 1.2 V - 0.3 - - - V VCC = 2.0 V 0.2 0.55 0.8 0.2 0.8 V VCC = 2.7 V 0.3 0.60 1.1 0.3 1.1 V VCC = 3.0 V 0.4 0.65 1.2 0.4 1.2 V VCC = 3.6 V 0.4 0.70 1.2 0.4 1.2 V VCC = 4.5 V 0.4 0.80 1.4 0.4 1.4 V VCC = 5.5 V 0.6 1.00 1.5 0.6 1.5 V Table 10. Transfer characteristics …continued GND = 0 V; For test circuit see Figure 7. Symbol Parameter Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max VT+ and VT− limits at 70 % and 20 %. Fig 8. Transfer characteristic Fig 9. Definition of VT+, VT− and VH mna207 VO VI VH VT+ VT− mna208 VO VI VH VT+ VT− |
Podobny numer części - 74LV132D |
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Podobny opis - 74LV132D |
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