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74LVC1G04 Arkusz danych(PDF) 7 Page - NXP Semiconductors |
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74LVC1G04 Arkusz danych(HTML) 7 Page - NXP Semiconductors |
7 / 15 page 74LVC1G04_8 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 08 — 27 April 2009 7 of 15 NXP Semiconductors 74LVC1G04 Single inverter 11. Dynamic characteristics [1] Typical values are measured at Tamb =25 °C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively. [2] tpd is the same as tPLH and tPHL. [3] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(C L × VCC 2 × f o) = sum of outputs. 12. AC waveforms Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 8. Symbol Parameter Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max tpd propagation delay A to Y; see Figure 7 [2] VCC = 1.65 V to 1.95 V 1.0 3.0 7.5 1.0 9.5 ns VCC = 2.3 V to 2.7 V 0.5 2.0 5.0 0.5 6.5 ns VCC = 2.7 V 0.5 2.3 5.2 0.5 7.0 ns VCC = 3.0 V to 3.6 V 0.5 2.0 4.2 0.5 5.5 ns VCC = 4.5 V to 5.5 V 0.5 1.6 3.7 0.5 5.0 ns CPD power dissipation capacitance VI = GND to VCC; VCC = 3.3 V [3] -14- - - pF Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. Fig 7. The input A to output Y propagation delays mna640 tPHL tPLH VM VM A input Y output GND VI VOH VOL |
Podobny numer części - 74LVC1G04_09 |
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Podobny opis - 74LVC1G04_09 |
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