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CS1600 Arkusz danych(PDF) 9 Page - Cirrus Logic |
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CS1600 Arkusz danych(HTML) 9 Page - Cirrus Logic |
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9 / 18 page  CS1600 DS904A5 9 4.1.2 Burst Mode In addition to the start-up mode and normal mode of operation, the controller enters the burst mode of operation when the estimated output power (PO) is < 5% of its nominal value. During this stage, the PFC driver is disabled intermittently over a full line cycle period, as shown in Figure 12. The period of time for which the PFC drive is disabled depends on the level of loading present.. Figure 12. Burst Mode of Operation 4.2 Input Feedforward and Output Regulation The CS1600 continuously monitors the rectified AC line and the PFC output voltage through sense resistors tied to the IAC and the FB pins to monitor the voltages, scaled as currents. The rectified AC line sense resistor RAC needs to be the same size of the resistor RFB used for current feedback from the PFC output voltage. These currents are effectively compared against an internal reference current to provide adaptive PFC control. The resistor values are calculated as follows: where RFB = Feedback resistor used to sense the PFC output voltage RAC = Feedforward resistor used to sense the rectified line voltage Vlink= PFC Output Voltage VDD = IC Supply Voltage Iref = Target Reference current used for feedback Figure 13. Output Feedback Figure 14. Input Feedforward 4.3 Protection Features 4.3.1 Overvoltage Protection If the PFC output voltage, Vlink, exceeds the overvoltage threshold, as scaled by the current monitored by the sense resistors, the CS1600 provides protection by disabling the gate drive. A nominal hysteresis is provided to allow the system to recover from the fault condition, before switching is resumed. 4.3.2 Overcurrent Protection The CS1600’s digital controller algorithm limits the ON time of the Power MOSFET by the following equation: Where Ton is the max time that the power MOSFET is turned on and Vrect is the rectified line voltage. In the event of a sudden line surge or sporadic, high dv/dt line voltages, this equation may not limit the ON time appro- priately. For this type of line disturbance, additional pro- tection mechanisms, such as fusible resistors, fast-blow fuses, or other current-limiting devices, are recommend- ed. Vin [V] t [ms] FET Vgs Burst Mode Active Vin PO [W] t [ms] 5% PFC Disable R FB V link V DD – I ref ----------------------------- = [Eq.1] R AC R FB = [Eq.2] RFB IFB FB VDD ADC 7 RIFB 15k 4 Vlink RFB IFB FB VDD ADC 7 RIFB 15k 4 Vlink T on 0.001126 V rect ------------------------- ≤ |
Podobny numer części - CS1600 |
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Podobny opis - CS1600 |
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