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N02L83W2AN25I Arkusz danych(PDF) 2 Page - ON Semiconductor |
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2 / 10 page Rev. 8 | Page 2 of 10 | www.onsemi.com N02L83W2A Functional Block Diagram Functional Description CE1 CE2 WE OE I/O0 - I/O7 MODE POWER H X X X High Z Standby1 1. When the device is in standby mode, control inputs (WE and OE), address inputs and data input/outputs are internally isolated from any external influence and disabled from exerting any influence externally. Standby X L X X High Z Standby1 Standby LHL X2 2. When WE is invoked, the OE input is internally disabled and has no effect on the circuit. Data In Write2 Active LH HL Data Out Read Active L H H H High Z Active Active Capacitance1 1. These parameters are verified in device characterization and are not 100% tested Item Symbol Test Condition Min Max Unit Input Capacitance CIN VIN = 0V, f = 1 MHz, TA = 25oC 8pF I/O Capacitance CI/O VIN = 0V, f = 1 MHz, TA = 25oC 8pF Control Logic Page Decode Logic Address Inputs A4 - A17 Input/ Output Mux and Buffers I/O0 - I/O7 Address Word Decode Logic Address Address Inputs A0 - A3 16K Page x 16 word x 8 bit RAM Array CE1 CE2 WE OE |
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