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AD9125BCPZ Arkusz danych(PDF) 8 Page - Analog Devices |
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AD9125BCPZ Arkusz danych(HTML) 8 Page - Analog Devices |
8 / 56 page AD9125 Rev. 0 | Page 8 of 56 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 CVDD18 DACCLKP DACCLKN CVSS FRAME NC IRQ D31 D30 NC IOVDD DVDD18 D29 D28 D27 D26 17 D25 18 D24 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 RESET CS SCLK SDIO SDO DVDD18 D0 D1 D2 D3 DVSS DVDD18 D4 D5 D6 D7 D8 D9 PIN 1 INDICATOR AD9125 TOP VIEW (Not to Scale) NOTES 1. NC = NO CONNECT. 2. EXPOSED PAD MUST BE CONNECTED TO AVSS. Figure 3. Pin Configuration Table 8. Pin Function Descriptions Pin No. Mnemonic Description 1 CVDD18 1.8 V Clock Supply. Supplies clock receivers, clock distribution, and PLL circuitry. 2 DACCLKP DAC Clock Input, Positive. 3 DACCLKN DAC Clock Input, Negative. 4 CVSS Clock Supply Common. 5 FRAME Frame Input. 6 NC No Connect 7 IRQ (INT) Interrupt Request. Open Drain, Active Low Output. Connect external pull-up to IOVDD. 8 D31 Data Bit 31. 9 D30 Data Bit 30. 10 NC No Connect. 11 IOVDD Supply for Serial Port Pin, RESET Pin, and IRQ Pin. 1.8 V to 3.3 V can be applied to this pin. 12 DVDD18 1.8 V Digital Supply. Supplies power to digital core and digital data ports. 13 D29 Data Bit 29. 14 D28 Data Bit 28. 15 D27 Data Bit 27. 16 D26 Data Bit 26. 17 D25 Data Bit 25. 18 D24 Data Bit 24. 19 D23 Data Bit 23. 20 D22 Data Bit 22. 21 D21 Data Bit 21. 22 D20 Data Bit 20. 23 D19 Data Bit 19. 24 D18 Data Bit 18. 25 D17 Data Bit 17. 26 D16 Data Bit 16. 27 DCI Data Clock Input. |
Podobny numer części - AD9125BCPZ |
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Podobny opis - AD9125BCPZ |
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