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TS3L501E Arkusz danych(PDF) 8 Page - Texas Instruments |
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TS3L501E Arkusz danych(HTML) 8 Page - Texas Instruments |
8 / 14 page CL (see Note A) TEST CIRCUIT S1 2 × VDD Open GND RL RL VOH VOL VOLTAGE WAVEFORMS OUTPUT SKEW (tsk(o)) Data Out at YB1 or YB2 NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR≤ 10 MHz, ZO = 50 W, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. 50 W VG1 VDD DUT 50 W VIN 50 W VG2 50 W VI TEST RL S1 CL 3.3 V ± 0.3 V VDD Vin tsk(p) tsk(o) 3.3 V ± 0.3 V Open Open 200 W 200 W VDD or GND VDD or GND 10 pF 10 pF Input Generator Input Generator VO (VOH + VOL)/2 VOH VOL Data Out at XB1 or XB2 (VOH + VOL)/2 3.5 V 1.5 V Data In at Ax or Ay 2.5 V tPLHx tPHLx tsk(o) tsk(o) tPLHy tPHLy tsk(o) = t PLHy - t PLHx or t PHLy - t PHLx VOH VOL VOLTAGE WAVEFORMS PULSE SKEW [tsk(p)] Output (VOH + VOL)/2 Input 2.5 V tPLH tPHL tsk(p) = t PHL - t PLH 3.5 V 1.5 V VO VI VO TS3L501E SCDS307A – SEPTEMBER 2010 – REVISED SEPTEMBER 2010 www.ti.com PARAMETER MEASUREMENT INFORMATION (Skew) Figure 6. Test Circuit and Voltage Waveforms 8 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): TS3L501E |
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