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ISL22319WFU8Z Arkusz danych(PDF) 10 Page - Intersil Corporation

Numer części ISL22319WFU8Z
Szczegółowy opis  Single Digitally Controlled Potentiometer XDCP
Download  13 Pages
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Producent  INTERSIL [Intersil Corporation]
Strona internetowa  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL22319WFU8Z Arkusz danych(HTML) 10 Page - Intersil Corporation

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10
FN6310.0
July 3, 2006
Protocol Conventions
Data states on the SDA line must change only during SCL
LOW periods. SDA state changes during SCL HIGH are
reserved for indicating START and STOP conditions (See
Figure 12). On power-up of the ISL22319 the SDA pin is in
the input mode.
All I2C interface operations must begin with a START
condition, which is a HIGH to LOW transition of SDA while
SCL is HIGH. The ISL22319 continuously monitors the SDA
and SCL lines for the START condition and does not
respond to any command until this condition is met (See
Figure 12). A START condition is ignored during the
powerHup of the device.
All I2C interface operations must be terminated by a STOP
condition, which is a LOW to HIGH transition of SDA while
SCL is HIGH (See Figure 12). A STOP condition at the end
of a read operation, or at the end of a write operation places
the device in its standby mode.
An ACK, Acknowledge, is a software convention used to
indicate a successful data transfer. The transmitting device,
either master or slave, releases the SDA bus after
transmitting eight bits. During the ninth clock cycle, the
receiver pulls the SDA line LOW to acknowledge the
reception of the eight bits of data (See Figure 13).
The ISL22319 responds with an ACK after recognition of a
START condition followed by a valid Identification Byte, and
once again after successful receipt of an Address Byte. The
ISL22319 also responds with an ACK after receiving a Data
Byte of a write operation. The master must respond with an
ACK after receiving a Data Byte of a read operation
A valid Identification Byte contains 01010 as the five MSBs, and
the following two bits matching the logic values present at pins
A1 and A0. The LSB is the Read/Write bit. Its value is “1” for a
Read operation, and “0” for a Write operation (See Table 3).
TABLE 3. IDENTIFICATION BYTE FORMAT
01010
A1
A0
R/W
(MSB)
(LSB)
Logic values at pins A1 and A0 respectively
SDA
SCL
START
DATA
DATA
STOP
STABLE
CHANGE
DATA
STABLE
FIGURE 12. VALID DATA CHANGES, START, AND STOP CONDITIONS
SDA OUTPUT FROM
TRANSMITTER
SDA OUTPUT FROM
RECEIVER
8
1
9
START
ACK
SCL FROM
MASTER
HIGH IMPEDANCE
HIGH IMPEDANCE
FIGURE 13. ACKNOWLEDGE RESPONSE FROM RECEIVER
ISL22319


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