Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

ISL12024 Arkusz danych(PDF) 9 Page - Intersil Corporation

Numer części ISL12024
Szczegółowy opis  Real-Time Clock/Calendar with Embedded Unique ID
Download  25 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  INTERSIL [Intersil Corporation]
Strona internetowa  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL12024 Arkusz danych(HTML) 9 Page - Intersil Corporation

Back Button ISL12024 Datasheet HTML 5Page - Intersil Corporation ISL12024 Datasheet HTML 6Page - Intersil Corporation ISL12024 Datasheet HTML 7Page - Intersil Corporation ISL12024 Datasheet HTML 8Page - Intersil Corporation ISL12024 Datasheet HTML 9Page - Intersil Corporation ISL12024 Datasheet HTML 10Page - Intersil Corporation ISL12024 Datasheet HTML 11Page - Intersil Corporation ISL12024 Datasheet HTML 12Page - Intersil Corporation ISL12024 Datasheet HTML 13Page - Intersil Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 25 page
background image
9
FN6370.1
October 18, 2006
by the system software designer. The default value is
defined as ‘0’.
24 Hour Time
If the MIL bit of the HR register is 1, the RTC uses a 24-hour
format. If the MIL bit is 0, the RTC uses a 12-hour format and
H21 bit functions as an AM/PM indicator with a ‘1’
representing PM. The clock defaults to standard time with
H21 = 0.
Leap Years
Leap years add the day February 29 and are defined as
those years that are divisible by 4.
Status Register (SR)
The Status Register is located in the CCR memory map at
address 003Fh. This is a volatile register only and is used to
control the WEL and RWEL write enable latches, read power
status and two alarm bits. This register is separate from both
the array and the Clock/Control Registers (CCR).
BAT: Battery Supply—Volatile
This bit set to “1” indicates that the device is operating from
VBAT, not VDD. It is a read-only bit and is set/reset by
hardware (ISL12024 internally). Once the device begins
operating from VDD, the device sets this bit to “0”.
AL1, AL0: Alarm bits—Volatile
These bits announce if either alarm 0 or alarm 1 match the
real-time clock. If there is a match, the respective bit is set to
‘1’. The falling edge of the last data bit in a SR Read
operation resets the flags. Note: Only the AL bits that are set
when an SR read starts will be reset. An alarm bit that is set
by an alarm occurring during an SR read operation will
remain set after the read operation is complete.
OSCF: Oscillator Fail Indicator
This bit is set to “1” if the oscillator is not operating. The bit is
set to “0” only if the oscillator is functioning. This bit is read
only, and is set/reset by hardware.
RWEL: Register Write Enable Latch—Volatile
This bit is a volatile latch that powers up in the LOW
(disabled) state. The RWEL bit must be set to “1” prior to any
writes to the Clock/Control Registers. Writes to RWEL bit do
not cause a non-volatile write cycle, so the device is ready
for the next operation immediately after the stop condition. A
write to the CCR requires both the RWEL and WEL bits to be
set in a specific sequence.
WEL: Write Enable Latch—Volatile
The WEL bit controls the access to the CCR during a write
operation. This bit is a volatile latch that powers up in the
LOW (disabled) state. While the WEL bit is LOW, writes to
the CCR address will be ignored, although acknowledgment
is still issued. The WEL bit is set by writing a “1” to the WEL
bit and zeroes to the other bits of the Status Register. Once
set, WEL remains set until either reset to 0 (by writing a “0”
to the WEL bit and zeroes to the other bits of the Status
Register) or until the part powers up again. Writes to WEL bit
do not cause a non-volatile write cycle, so the device is
ready for the next operation immediately after the stop
condition.
RTCF: Real-Time Clock Fail Bit—Volatile
This bit is set to a ‘1’ after a total power failure. This is a read
only bit that is set internally when the device powers up after
having lost all power to the device. The bit is set regardless
of whether VDD or VBAT is applied first. The loss of only one
of the supplies does not result in setting the RTCF bit. The
first valid write to the RTC after a complete power failure
(writing one byte is sufficient) resets the RTCF bit to ‘0’.
Unused Bits:
Bit 3 in the SR is not used, but must be zero. The Data Byte
output during a SR read will contain a zero in this bit
location.
TABLE 1. STATUS REGISTER (SR)
ADDR
7
6
5
4
3
2
1
0
003Fh
BAT
AL1
AL0
OSCF
0
RWEL
WEL
RTCF
Default
0
0
0
0
0
0
0
1
ISL12024


Podobny numer części - ISL12024

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Intersil Corporation
ISL12024 INTERSIL-ISL12024 Datasheet
768Kb / 6P
   High-Accuracy RTC Modules, Feature-Rich RTCs
ISL12024 INTERSIL-ISL12024 Datasheet
9Mb / 44P
   Providing high-performance solutions for every link in the signal chain
logo
Renesas Technology Corp
ISL12024 RENESAS-ISL12024 Datasheet
1,018Kb / 25P
   Real-Time Clock/Calendar with Embedded Unique ID
ISL12024IBZ RENESAS-ISL12024IBZ Datasheet
1,018Kb / 25P
   Real-Time Clock/Calendar with Embedded Unique ID
logo
Intersil Corporation
ISL12024IRTC INTERSIL-ISL12024IRTC Datasheet
426Kb / 24P
   Real-Time Clock/Calendar with Embedded Unique ID
December 15, 2011
More results

Podobny opis - ISL12024

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Intersil Corporation
ISL12024IRTC INTERSIL-ISL12024IRTC Datasheet
426Kb / 24P
   Real-Time Clock/Calendar with Embedded Unique ID
December 15, 2011
ISL12024IRTCZ INTERSIL-ISL12024IRTCZ Datasheet
359Kb / 24P
   Real-Time Clock/Calendar with Embedded Unique ID
logo
Renesas Technology Corp
ISL12024 RENESAS-ISL12024 Datasheet
1,018Kb / 25P
   Real-Time Clock/Calendar with Embedded Unique ID
ISL12024IRTC RENESAS-ISL12024IRTC Datasheet
974Kb / 24P
   Real-Time Clock/Calendar with Embedded Unique ID
logo
Microchip Technology
MCP79410 MICROCHIP-MCP79410_13 Datasheet
1Mb / 60P
   Battery-Backed I2C??Real-Time Clock/Calendar with EEPROM and Unique ID
11/29/12 2010-2013
MCP79400 MICROCHIP-MCP79400 Datasheet
574Kb / 38P
   I2C??Real-Time Clock/Calendar with SRAM, Unique ID and Battery Switchover
2011
MCP79400T-I MICROCHIP-MCP79400T-I Datasheet
1Mb / 42P
   I2C Real-Time Clock/Calendar with SRAM, Unique ID and Battery Switchover
11/29/11
MCP79410 MICROCHIP-MCP79410 Datasheet
580Kb / 38P
   I2C??Real-Time Clock/Calendar with EEPROM, SRAM, Unique ID and Battery Switchover
2011
logo
NXP Semiconductors
PCF8563 NXP-PCF8563_11 Datasheet
466Kb / 45P
   Real-time clock/calendar
Rev. 9-16 June 2011
PCF8563TF4.118 NXP-PCF8563TF4.118 Datasheet
492Kb / 50P
   Real-time clock/calendar
Rev. 10-3 April 2012
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25


Arkusz danych Pobierz

Go To PDF Page


Link URL




Polityka prywatności
ALLDATASHEET.PL
Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com