74AHC_AHCT573_5

All information provided in this document is subject to legal disclaimers.

© NXP B.V. 2010. All rights reserved.

Product data sheet

Rev. 05 — 25 March 2010

5 of 19

NXP Semiconductors

74AHC573; 74AHCT573

Octal D-type transparant latch; 3-state

6.

Functional description

[1]

H = HIGH voltage level;

h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition;

L = LOW voltage level;

l = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition;

Z = high-impedance OFF-state.

7.

Limiting values

[1]

The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

[2]

For SO20 packages: above 70

°C the value of P

For TSSOP20 packages: above 60

°C the value of P

For DHVQFN20 packages: above 60

°C the value of P

Table 3.

Function table[1]

Operating mode

Input

Internal latch

Output

OE

LE

Dn

Qn

Enable and read register (transparent

mode)

LH

L

L

L

HH

H

Latch and read register

L

L

l

L

L

hH

H

Latch register and disable outputs

H

L

l

L

Z

hH

Z

Table 4.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol

Parameter

Conditions

Min

Max

Unit

supply voltage

−0.5

+7.0

V

input voltage

−0.5

+7.0

V

input clamping current

[1]

−20

-

mA

output clamping current

[1]

−20

+20

mA

output current

−25

+25

mA

supply current

-

+75

mA

ground current

−75

-

mA

storage temperature

−65

+150

°C

total power dissipation

[2] -

500

mW