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ISL24201 Arkusz danych(PDF) 7 Page - Intersil Corporation |
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ISL24201 Arkusz danych(HTML) 7 Page - Intersil Corporation |
7 / 12 page ISL24201 7 FN7586.1 December 9, 2010 The maximum voltage on the SET pin is AVDD/20 and is added to the minimum voltage difference between the VOUT and SET pins to calculate the minimum VOUT voltage, as shown in Equation 5. Output Voltage The output voltage, VOUT, of the OUT pin can be calculated from Equation 6: While Equation 6 can be used to calculate the output voltage, it does not help select the values of R1, R2 and RSET to obtain a specific range of VCOM voltages. Output Voltage Span Calculation The span of the output voltage is typically centered around the nominal VCOM voltage value, which is typically near half of the AVDD voltage. The high VCOM voltage occurs with the register value of zero, while the low VCOM voltage occurs with the register value of 255. Figure 7 shows the definition of several terms used later in the text. There are three variables that control the VCOM calibrator’s operating point; the span of the VCOM voltage, the maximum current sink and the source impedance of the resistive divider. Figure 8 shows a range of operating points for these three variables and a quick way to estimate a specific operating point. The X-axis is the span of the VCOM voltage (High VCOM Voltage - Low VCOM Voltage), and the Y-axis is the maximum sink current set by RSET. The individual plots of each RTH show the VCOM span plotted against the maximum OUT sink current given that value of source impedance of the voltage divider. RTH is the Thevenin equivalent resistance of the voltage divider R1 and R2, which is the resistance of the parallel combination of R1 and R2, as shown in Equation 7. The span of the VCOM voltage is shown by Equation 8. To make a final selection of the resistor values for R1 and R2, The supply voltage AVDD and the value of RSET are specified. The calculations for R1 and R2 are shown in Equations 9 and 10: The R1 and R2 calculations are based on the span of the VCOM voltage being centered at half the AVDD voltage. As an example, AVDD = 15V, the maximum value for ISET is selected to be 100µA and the required span is 2V. Using Figure 8 as a guide, the VCOM maximum is equal to 8.5V and the VCOM minimum is equal to 6.5V. Rearranging equation and calculation the value of RSET: Calculating the value of R1 is shown in Equation 12. Calculating the value of R2 is shown in Equation 13. VOUT MIN () AVDD 20 -------------- MinimumSaturationVoltage + ≥ (EQ. 5) VOUT AVDD R2 R1 R2 + -------------------- ⎝⎠ ⎜⎟ ⎛⎞ 1 RegisterValue 1 + 256 --------------------------------------------------- R1 20RSET -------------------- ⎝⎠ ⎜⎟ ⎛⎞ – ⎝⎠ ⎜⎟ ⎛⎞ = (EQ. 6) GND AVDD NOM INAL VCOM VOLTAGE HIGH VCOM VOLTAGE LOW VCOM VOLTAGE SPAN FIGURE 7. VOLTAGE LEVELS FOR VCOM RTH R1R2 R1 R2 + -------------------- = (EQ. 7) VCOMSPAN ISET RTH () = (EQ. 8) FIGURE 8. GRAPH of VCOM SPAN vs MAXIMUM OUTCURRENT AND RTH 0.6 0.5 0.4 0.3 0.2 0.1 0 01234 56 VCOM SPAN (V) RTH = 2 5kΩ RTH = 50kΩ RTH = 10 0kΩ R1 40RSET SPAN () AVDD SPAN + ------------------------------------------ = (EQ. 9) R2 40RSET SPAN () AVDD SPAN – ------------------------------------------ = (EQ. 10) RSET AVDD 20IOUT MAX () ------------------------------------- 15 20 0.000100 () -------------------------------------- 7500 Ω == = (EQ. 11) R1 40 7500 () 2 () 15 2 + ----------------------------------- 39.29k Ω == (EQ. 12) R2 40 7500 () 2 () 15 2 – ----------------------------------- 46.15k Ω == (EQ. 13) |
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