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LA1140 Arkusz danych(PDF) 9 Page - Sanyo Semicon Device |
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LA1140 Arkusz danych(HTML) 9 Page - Sanyo Semicon Device |
9 / 15 page Proper cares in using LA1140 1) The detector transformers should be designed to develop a quadrature signal (pin 11) of higher than 175 mVrms (approximately 105 dBµ) under high antenna signal input. If the quadrature signal strength is less than 125 mVrms, the muting drive output (V14) cannot decrease to zero even in a strong signal strength. Furthermore, when the quadrature signal strength lies between 125 mV and 175 mV, the muting drive output may move from zero to plus under high temperature conditions. 2) When designing a PC board, special care should be given to the ground pattern layout by referring to that of the recommend PC board example as shown below. 3) Do not connect a capacitor directly between pin 16 and ground. If the signal intensity of IF input varies in the vicinity of 90 dBµ, the voltage at pin 16 varies. Thus, charging/discharging current flows into the capacitor and goes to the muting drive output (pin 14) through the inverter inside the IC, thereby causing the muting to malfunction. Sample Application Circuit 1 Unit (resistance: Ω, capacitance: F) TOKO higher [Maximum Att. Adj.] lower [Muting ON level Adj.] [Slope Adj.] [Slope Adj.] LA1140 No. 729-9/15 |
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