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LC78835 Arkusz danych(PDF) 7 Page - Sanyo Semicon Device |
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LC78835 Arkusz danych(HTML) 7 Page - Sanyo Semicon Device |
7 / 14 page For further details concerning filter characteristics when de-emphasis is on, refer to page 13. — De-emphasis on/off De-emphasis on: EMP pin = “H” De-emphasis off: EMP pin = “L” — Selection of filter coefficient • Soft Mute Soft muting is performed using the built-in digital attenuator. The attenuation amount of the attenuator circuit is as follows: 20 log (ATT/256) dB Although ATT = 0 to 256, when ATT = 0, attenuation sets to – ∞. If the MUTE pin is set to “H” level, ATT approaches 0 in single-decreasing increments and the attenuation changes towards – ∞. On the other hand, when the MUTE pin is set to the “L” level, ATT approaches 256 in single-increasing increments and the attenuation amount changes to approach 0. The approximate speed during soft mute is 1024/fs. • Noise Shaper In order to reduce noise during DF arithmetic output requantization, the first-order noise shaper is utilized. • Double-Rate Support When the D/N pin is set to “H” level, CD high-speed playback is supported. At this time, BCLK, LRCK and DATA are input at double the frequency of normal operating times. The system clock operates at 384 fs and with a clock speed of 512 fs, double-rate is supported. Note that test mode is enabled for clock speeds of 392 fs and 448fs and double-rate is not supported. Normal-rate mode: D/N pin = “L” Double-rate mode: D/N pin = “H” No. 4624-7/14 LC78835K, 78835KM FS1 L H H L FS2 L L H H fs 44.1 kHz 32 kHz 48 kHz |
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