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AD9146 Arkusz danych(PDF) 9 Page - Analog Devices |
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AD9146 Arkusz danych(HTML) 9 Page - Analog Devices |
9 / 52 page AD9146 Rev. 0 | Page 9 of 52 Pin No. Mnemonic Description 28 D0N Data Bit 0 (LSB), Negative. 29 DVDD18 1.8 V Digital Supply. Supplies power to digital core and digital data ports. 30 TXENABLE Active High Transmit Path Enable (CMOS). A low level on this pin clamps the DAC outputs to midscale. 31 SDIO Serial Port Data Input/Output (CMOS). 32 SCLK Serial Port Clock Input (CMOS). 33 CS Serial Port Chip Select, Active Low (CMOS). 34 IRQ Interrupt Request. Open-drain, active low output. Pull this pin high external to the device. 35 DVDD18 1.8 V Digital Supply. Supplies power to digital core and digital data ports. 36 RESET Reset, Active Low (CMOS). 37 AVDD33 3.3 V Analog Supply. 38 IOUT2P Q DAC Positive Current Output. 39 IOUT2N Q DAC Negative Current Output. 40 AVDD33 3.3 V Analog Supply. 41 AVSS Analog Supply Common. 42 REFIO 1.2 V Band Gap Voltage Reference Output. Should be decoupled to AVSS with a 0.1 μF capacitor. 43 FSADJ Full-Scale Current Output Adjust. Place a 10 kΩ resistor from this pin to AVSS. 44 AVSS Analog Supply Common. 45 AVDD33 3.3 V Analog Supply. 46 IOUT1N I DAC Negative Current Output. 47 IOUT1P I DAC Positive Current Output. 48 AVDD33 3.3 V Analog Supply. EPAD The exposed pad (EPAD) must be soldered to the ground plane (AVSS). The EPAD provides an electrical, thermal, and mechanical connection to the board. |
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