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SM5M2 Arkusz danych(PDF) 11 Page - Sharp Corporation

Numer części SM5M2
Szczegółowy opis  4-Bit Single-Chip Microcomputer(LCD Driver)
Download  28 Pages
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Producent  SHARP [Sharp Corporation]
Strona internetowa  http://sharp-world.com/
Logo SHARP - Sharp Corporation

SM5M2 Arkusz danych(HTML) 11 Page - Sharp Corporation

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SM5M2
- 11 -
SM5M2
INTA pin
Noise debounce circuit
To interrupt controller
To ACC
Level
SM5M2
Output pin or I/O pin
set output
Output pin
Data bus of the
connected device
DON'T
Flags
The SM5M2 provides 4-flag (C flag and interrupt
request flag <IFA, IFD, P33>) which can be used to
set or determine conditions.
Output Latch Registers and Mode Registers
The output latch registers are connected to the P0,
P1 and P2 pins. By instruction, the contents of the
ACC can be transferred to the output latch registers.
The SM5M2 also contains mode registers RC, RD,
RE and RF. Setting the value of each register
enables the voice start address, divider, LCD,
melody or interrupt to be controlled.
Setting a
register is performed in the same way as the other
output pins. The functions of the mode registers
are shown in Table 1.
• INTA pin
INTA level can be loaded to ACC (bit 0), as follows.
LBLX
4
IN
INTA level does not through the noise debounce
circuit.
CAUTION :
Connecting considerations of I/O port
When using an I/O port as bidirectional bus such as data
bus, avoid setting the I/O port to output when the target pin
is also set output.
Whenever the both output data conflict each other, system
failure will be caused due to damaged circuits or
instantaneous supply voltage drop.


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