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5V2305NRGI Arkusz danych(PDF) 6 Page - Integrated Device Technology |
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5V2305NRGI Arkusz danych(HTML) 6 Page - Integrated Device Technology |
6 / 10 page 6 INDUSTRIALTEMPERATURERANGE IDT5V2305 2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER CLK tEN tDIS Gx Yx OUTPUT ENABLE GLITCH SUPPRESSION CIRCUIT Thepurposeoftheglitchsuppressioncircuitryistoensuretheoutputenablesequenceissynchronizedwiththeclockinputsuchthattheoutputbufferwillbe enabled on the next full period of the input clock (negative edge triggered by the input clock). The G input must be stable one tEN- time prior to the falling edge oftheCLKforpredictableoperation. G (tEN, tDIS) Relative to CLK ↓↓↓↓↓ |
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