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BTS611L1 Arkusz danych(PDF) 2 Page - Siemens Semiconductor Group

Numer części BTS611L1
Szczegółowy opis  Smart Two Channel Highside Power Switch
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Producent  SIEMENS [Siemens Semiconductor Group]
Strona internetowa  http://www.siemens.com/
Logo SIEMENS - Siemens Semiconductor Group

BTS611L1 Arkusz danych(HTML) 2 Page - Siemens Semiconductor Group

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BTS 611 L1
Semiconductor Group
2
Pin
Symbol
Function
1
OUT1 (Load, L)
Output 1, protected high-side power output of channel 1
2
GND
Logic ground
3
IN1
Input 1, activates channel 1 in case of logical high signal
4Vbb
Positive power supply voltage,
the tab is shorted to this pin
5ST
Diagnostic feedback: open drain, low on failure
6
IN2
Input 2, activates channel 2 in case of logical high signal
7
OUT2 (Load, L)
Output 2, protected high-side power output of channel 2
Maximum Ratings at Tj = 25 °C unless otherwise specified
Parameter
Symbol
Values
Unit
Supply voltage (overvoltage protection see page 4)
Vbb
43
V
Supply voltage for full short circuit protection
Tj Start=-40 ...+150°C
Vbb
34
V
Load dump protection2)
VLoadDump = UA + Vs, UA = 13.5 V
RI3)= 2
Ω, RL= 5.3 Ω, td= 200 ms, IN= low or high
VLoad dump4)
60
V
Load current (Short circuit current, see page 5)
IL
self-limited
A
Operating temperature range
Storage temperature range
Tj
Tstg
-40 ...+150
-55 ...+150
°C
Power dissipation (DC), TC
≤ 25 °C
Ptot
36
W
Inductive load switch-off energy dissipation, single pulse
Vbb = 12V, Tj,start = 150°C, TC = 150°C const.
one channel,
IL = 2.3 A, ZL = 89 mH, 0 Ω:
EAS
290
mJ
both channels parallel,
IL = 4.4 A, ZL = 47 mH, 0 Ω:
580
see diagrams on page 9
Electrostatic discharge capability (ESD)
IN:
(Human Body Model)
all other pins:
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993
VESD
1.0
2.0
kV
Input voltage (DC)
VIN
-10 ... +16
V
Current through input pin (DC)
Current through status pin (DC)
see internal circuit diagrams page 7
IIN
IST
±2.0
±5.0
mA
2
)
Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins, e.g. with a
150
Ω resistor in the GND connection and a 15 kΩ resistor in series with the status pin. A resistor for the
protection of the input is integrated.
3)
RI = internal resistance of the load dump test pulse generator
4)
VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839


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