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AZV99NG Arkusz danych(PDF) 4 Page - Arizona Microtek, Inc

Numer części AZV99NG
Szczegółowy opis  PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Enable
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Producent  AZM [Arizona Microtek, Inc]
Strona internetowa  http://azmicrotek.com
Logo AZM - Arizona Microtek, Inc

AZV99NG Arkusz danych(HTML) 4 Page - Arizona Microtek, Inc

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Arizona Microtek, Inc.
AZV99
PECL/LVDS Oscillator Gain Stage &
Buffer with Selectable Enable
www.azmicrotek.com
+1-480-962-5881
4
Request a Sample
May 2012, Rev 2.0
ENGINEERING NOTES
FUNCTIONALITY MLP16 PACKAGE (AZV99L)
The AZV99L provides a selectable enable (EN). Enable polarity and threshold can be selected to accommodate either
CMOS/TTL or PECL input levels. If enable pull-up is desired in the CMOS/TTL mode, an external
≤ 20kΩ resistor
connecting EN to VCC will override the on-chip pull-down resistor.
Outputs Q/Q
¯ each have a selectable on-chip pull-down current source. External resistors may also be used to increase
pull-down current to a maximum of 25mA (includes internal on-chip current source).
The AZV99 also provides input biasing which is accomplished with a VBB and 470Ω internal resistors from D to VBB and D
¯ to
VBB. The VBB pin supports 1.5mA sink/source current. VBB should be bypassed to ground with a 0.01µF capacitor.
FUNCTIONALITY MLP8 PACKAGE (AZV99NB & AZV99ND)
The AZV99NB and AZV99NB provide a PECL/ECL level enable input (EN
¯¯¯). When the EN
¯¯¯ input is LOW, the Q
¯ and
QHG/Q
¯HG outputs pass data from the inputs. When EN
¯¯¯ is HIGH, the Q
¯ output continues to pass data while the QHG output
is forced high and the Q
¯ HG output is forced low.
Only the Q
¯ output operates with a current source (4 mA) to VEE. This is accomplished by internal bonding of CS-SEL. An
external resistor may also be used to increase pull-down current to a maximum of 25mA (includes 4mA on-chip current
source).
The AZV99NB and AZV99ND versions operate with a single ended data input (D). The D
¯ input is internally bonded
directly to the VBB pin bypassing the 470Ω bias resistor.
FUNCTIONALITY MLP8 PACKAGE (AZV99N) & MSOP8 PACKAGE (AZV99T)
The AZV99N and AZV99T provide a CMOS/TTL level enable input (EN). When the EN input is HIGH, the Q
¯ and
QHG/Q
¯ HG outputs pass data from the inputs. When EN is LOW, the Q
¯ output continues to pass data while the QHG output is
forced high and the Q
¯ HG output is forced low.
Only the Q
¯ output operates with a current source (4 mA) to VEE. This is accomplished by internal bonding of CS-SEL. An
external resistor may also be used to increase pull-down current to a maximum of 25mA (includes 4mA on-chip current
source).
The MSOP8 (T) and MLP8 (N) AZV99 operate with a single ended data input (D). The D
¯ input is internally bonded
directly to the VBB pin bypassing the 470Ω bias resistor.


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