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SM32C6416TGLZA6EP Arkusz danych(PDF) 5 Page - Texas Instruments |
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SM32C6416TGLZA6EP Arkusz danych(HTML) 5 Page - Texas Instruments |
5 / 130 page SM32C6416T-EP FIXEDPOINT DIGITAL SIGNAL PROCESSOR SGUS056A − MARCH 2005 − REVISED FEBRUARY 2006 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 device characteristics Table 1 provides an overview of the C6416T DSP. The table shows significant features of the C64x devices, including the capacity of on-chip RAM, the peripherals, the CPU frequency, and the package type with pin count. Table 1. Characteristics of the C6416T Processor HARDWARE FEATURES C6416T (600, 720 MHz) C6416T (850 MHz, 1 GHz) EMIFA (64-bit bus width) (default clock source = AECLKIN) 1 1 Peripherals EMIFB (16-bit bus width) (default clock source = BECLKIN) 1 1 Peripherals Not all peripherals pins EDMA (64 independent channels) 1 1 Not all peripherals pins are available at the same HPI (32- or 16-bit user selectable) 1 (HPI16 or HPI32) 1 (HPI16 or HPI32) are available at the same time. (For more details, see the Device PCI (32-bit) 1 1 time. (For more details, see the Device Configuration section.) Peripheral performance is McBSPs (default internal clock source = CPU/4 clock frequency) 3 3 Peripheral performance is dependent on chip-level UTOPIA (8-bit mode) 1 1 dependent on chip-level configuration. 32-Bit Timers (default internal clock source = CPU/8 clock frequency) 3 3 General-Purpose Input/Output 0 (GP0) 16 16 Decoder Coprocessors VCP 1 1 Decoder Coprocessors TCP 1 1 Size (Bytes) 1056K 1056K On-Chip Memory Organization 16K-Byte (16KB) L1 Program (L1P) Cache 16KB L1 Data (L1D) Cache 1024KB Unified Mapped RAM/Cache (L2) 16K-Byte (16KB) L1 Program (L1P) Cache 16KB L1 Data (L1D) Cache 1024KB Unified Mapped RAM/Cache (L2) CPU ID + CPU Rev ID Control Status Register (CSR.[31:16]) 0x0C01 0x0C01 Device_ID Silicon Revision Identification Register (DEVICE_REV [20:16]) Address: 0x01B0 0200 DEVICE_REV[20:16] Silicon Revision 10000 1.0 DEVICE_REV[20:16] Silicon Revision 10000 1.0 Frequency MHz 600, 720 850 MHz, 1 GHz Cycle Time ns 1.67 ns - 6 (600 MHz) 1.39 ns - 7 (720 MHz) 1.17 ns - 8 [850 MHz] 1 ns - 1 (1 GHz) Voltage Core (V) 1.1 V (-600) 1.2 V (-720) −1.2 V (850) 1.2 V (1 G) Voltage I/O (V) 3.3 V 3.3 V PLL Options CLKIN frequency multiplier Bypass (x1), x6, x12, x20 Bypass (x1), x6, x12, x20 BGA Package 23 x 23 mm 532-Pin BGA (GLZ) 532-Pin BGA (GLZ) Process Technology µm 0.09 µm 0.09 µm Product Status Product Preview (PP) Production Data (PD) PP PD PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. |
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