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SM320C50PQM66EP Arkusz danych(PDF) 1 Page - Texas Instruments |
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SM320C50PQM66EP Arkusz danych(HTML) 1 Page - Texas Instruments |
1 / 29 page Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. SM320C50EP DIGITAL SIGNAL PROCESSOR SGUS040A − AUGUST 2002 − REVISED JANUARY 2006 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 D Controlled Baseline − One Assembly/Test Site, One Fabrication Site D Enhanced Diminishing Manufacturing Sources (DMS) Support D Enhanced Product Change Notification D Qualification Pedigree† D Military Operating Temperature Range: −55 °C to 125°C D Industrial Operating Temperature Range: −40 °C to 85°C D Fast Instruction Cycle Time (30 ns and 40 ns) and 25 ns for Industrial Temp Range D Source-Code Compatible With All TMS320C1x and TMS320C2x Devices D RAM-Based Operation − 9K × 16-Bit Single-Cycle On-Chip Program/Data RAM − 1056 × 16-Bit Dual-Access On-Chip Data RAM D 2K × 16-Bit On-Chip Boot ROM D 224K × 16-Bit Maximum Addressable External Memory Space (64K Program, 64K Data, 64K I/O, and 32K Global) D 32-Bit Arithmetic Logic Unit (ALU) − 32-bit Accumulator (ACC) − 32-Bit Accumulator Buffer (ACCB) D 16-Bit Parallel Logic Unit (PLU) D 16 × 16-Bit Multiplier, 32-Bit Product D 11 Context-Switch Registers D Two Buffers for Circular Addressing D Full-Duplex Synchronous Serial Port D Time-Division Multiplexed Serial Port (TDM) D Timer With Control and Counter Registers D 16 Software-Programmable Wait-State Generators D Divide-by-One Clock Option D IEEE 1149.1‡ Boundary Scan Logic D Operations Are Fully Static D Enhanced Performance Implanted CMOS (EPIC ) Technology Fabricated by Texas Instruments D Packaging − 132-Lead Plastic Quad Flat Package (PQ Suffix) description The SM320C50-EP digital signal processor (DSP) is a high-performance, 16-bit, fixed-point processor manufactured in 0.72- µm double-level metal CMOS technology. The C50 is the first DSP from TI designed as a fully static device. Full-static CMOS design contributes to low power consumption while maintaining high performance, making it ideal for applications such as battery-operated communications systems, satellite systems, and advanced control algorithms. PQ PACKAGE (TOP VIEW) 1 17 18 117 116 50 51 83 84 132 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 2006, Texas Instruments Incorporated † Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. ‡ EEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture EPIC is a trademark of Texas Instruments. All trademarks are the property of their respective owners. |
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