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SN74ABT162827DL Arkusz danych(PDF) 1 Page - Texas Instruments

Numer części SN74ABT162827DL
Szczegółowy opis  20-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
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Producent  TI1 [Texas Instruments]
Strona internetowa  http://www.ti.com
Logo TI1 - Texas Instruments

SN74ABT162827DL Arkusz danych(HTML) 1 Page - Texas Instruments

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SN54ABT162827 . . . WD PACKAGE
SN74ABT162827 . . . DGG OR DL PACKAGE
(TOP VIEW)
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1OE1
1Y1
1Y2
GND
1Y3
1Y4
VCC
1Y5
1Y6
1Y7
GND
1Y8
1Y9
1Y10
2Y1
2Y2
2Y3
GND
2Y4
2Y5
2Y6
VCC
2Y7
2Y8
GND
2Y9
2Y10
2OE1
1OE2
1A1
1A2
GND
1A3
A14
VCC
1A5
1A6
1A7
GND
1A8
1A9
1A10
2A1
2A2
2A3
GND
2A4
2A5
2A6
VCC
2A7
2A8
GND
2A9
2A10
2OE2
SN54ABT162827, SN74ABT162827
20BIT BUFFERS/DRIVERS
WITH 3STATE OUTPUTS
SCBS248B − JULY 1993 − REVISED DECEMBER 1994
Copyright
1994, Texas Instruments Incorporated
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251−1443
Output Ports Have Equivalent 25-Ω Series
Resistors, So No External Resistors Are
Required
Members of the Texas Instruments
Widebus
 Family
State-of-the-Art EPIC-ΙΙB BiCMOS Design
Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
Typical V
OLP (Output Ground Bounce)
< 1 V at VCC = 5 V, TA = 25°C
Distributed V
CC and GND Pin Configuration
Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes
PCB Layout
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings
description
The
′ABT162827 are noninverting 20-bit buffers
composed of two 10-bit buffers with separate
output-enable signals. For either 10-bit buffer, the
two output-enable (1OE1 and 1OE2 or 2OE1 and
2OE2)
inputs
must
both
be
low
for
the
corresponding Y outputs to be active. If either
output-enable input is high, the outputs of that
10-bit buffer are in the high-impedance state.
The outputs, which are designed to source or sink
up to 12 mA, include 25-
Ω series resistors to
reduce overshoot and undershoot.
To ensure the high-impedance state during power up or power down, OE inputs should be tied to VCC through
a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74ABT162827 is available in TI’s shrink small-outline package (DL), which provides twice the I/O pin
count and functionality of standard small-outline packages in the same printed-circuit-board area.
The SN54ABT162827 is characterized for operation over the full military temperature range of −55
°C to 125°C.
The SN74ABT162827 is characterized for operation from − 40
°C to 85°C.
Widebus and EPIC-
ΙΙB are trademarks of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.


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