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FM23MLD16 Arkusz danych(PDF) 6 Page - Cypress Semiconductor

Numer części FM23MLD16
Szczegółowy opis  8Mbit F-RAM Memory
Download  13 Pages
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Producent  CYPRESS [Cypress Semiconductor]
Strona internetowa  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

FM23MLD16 Arkusz danych(HTML) 6 Page - Cypress Semiconductor

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FM23MLD16 - 512Kx16 FRAM (multi die)
Rev. 2.0
June 2012
Page 6 of 13
PCB Layout Recommendations
A 0.1uF decoupling capacitor should be placed close
to each power/ground pair (solder balls 1D/1E and
6D/6E). The ground side of the capacitor should be
connected to either a ground plane or low impedance
path back to the VSS pins. It is best to use a chip
capacitor that has low ESR and has good high
frequency characteristics.
If the controller drives the address and chip enable
from the same timing edge, it is best to keep the
address routes short and of equal length. A simple
RC circuit may be inserted in the chip enable path to
provide some delay and timing margin for the
FM23MLD16’s address setup time tAS.
As a general rule, the layout designer may need to
add series termination resistors to controller outputs
that have fast transitions or routes that are > 15cm in
length. This is only necessary if the edge rate is less
than or equal to the round trip trace delay. Signal
overshoot and ringback may be large enough to cause
erratic device behavior. It is best to add a 50 ohm
resistor (30 – 60 ohms) near the output driver
(controller) to reduce such transmission line effects.


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