PRELIMINARY TECHNICAL DATA

Nonvolatile Memory Digital Potentiometers

AD5235

REV PrD 6 NOV, 2000

9

Information contained in this Product Concept data sheet describes a product in the early definition stage. There is no guarantee that the

information contained here will become a final product in its present form. For latest information contact Walt Heinzer/Analog Devices, Santa Clara,

CA. TEL(408)562-7254; FAX (408)727-1550; walt.heinzer@analog.com

TEST CIRCUITS

Figures 7 to 15 define the test conditions used in the product

specification's table.

Figure 7. Potentiometer Divider Nonlinearity error test circuit

(INL, DNL)

Figure 8. Resistor Position Nonlinearity Error (Rheostat Operation;

R-INL, R-DNL)

Figure 9. Wiper Resistance test Circuit

Figure 10. Power supply sensitivity test circuit (PSS, PSSR)

Figure 11. Inverting Gain test Circuit

Figure 12. Non-Inverting Gain test circuit

Figure 13. Gain Vs Frequency test circuit

Figure 14. Incremental ON Resistance Test Circuit

Figure 15. Common Mode Leakage current test circuit

TYPICAL PERFORMANCE GRAPHS

TBD