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CS1630-FSZ Arkusz danych(PDF) 8 Page - Cirrus Logic |
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CS1630-FSZ Arkusz danych(HTML) 8 Page - Cirrus Logic |
8 / 56 page CS1630/31 8 DS954F2 3.2 I2C Port Switching Characteristics Test conditions (unless otherwise specified): • Inputs: Logic 0 = GND = 0V, Logic 1 = 3.3V. • The CS1630/31 control port only supports I2C slave functionality. • It is recommended that a 2.2k pull-up resistor be placed from the SDA pin to VDD. Parameter Symbol Min Typ Max Unit SCL Clock Frequency fscl -- 400 kHz Bus Free Time Between Transmissions tbuf 1.3 - - µs Start Condition Hold Time (prior to first clock pulse) thdst 0.6 - - µs Clock Low time tlow 1.3 - - µs Clock High Time thigh 0.6 - - µs Setup Time for Repeated Start Condition tsust 0.6 - - µs SDA Input Hold Time from SCL Falling thddi 0- 0.9 µs SDA Setup time to SCL Rising tsud 100 - - ns Setup Time for Stop Condition tsusp 0.6 - - µs SDA Input Voltage Low Vil -1.5 - V SDA Input Voltage High Vih -1.85- V SDA Output Voltage Low Vol -0.25- V Stop SD A SC L tf tsusp Stop tr thdst tsust thddo tsud thigh thddi tlow thdst tbuf Sta rt Re pe ate d Sta rt |
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