Zakładka z wyszukiwarką danych komponentów |
|
AD7118 Arkusz danych(PDF) 5 Page - Analog Devices |
|
AD7118 Arkusz danych(HTML) 5 Page - Analog Devices |
5 / 6 page AD7118 REV. A –5– DYNAMIC PERFORMANCE The dynamic performance of the AD7118 will depend upon the gain and phase characteristics of the output amplifier, together with the optimum choice of PC board layout and decoupling components. Figure 4 shows a printed circuit layout which minimizes feedthrough from VIN to the output in multiplying applications. Circuit layout is most important if the optimum performance of the AD7118 is to be achieved. Most application problems stem from either poor layout, grounding errors, or in- appropriate choice of amplifier. Figure 4. Suggested Layout for AD7118 and Op Amp It is recommended that when using the AD7118 with a high speed amplifier, a capacitor C1 be connected in the feedback path as shown in Figure 1. This capacitor, which should be between 30 pF and 50 pF, compensates for the phase lag intro- duced by the output capacitance of the D/A converter. Figures 5 and 6 show the performance of the AD7118 using the AD517, a fully compensated high gain superbeta amplifier, and the AD544, a fast FET input amplifier. The performance without C1 is shown in the middle trace and the response with C1 in circuit is shown in the bottom trace. Figure 5. Response of AD7118 with AD517L Figure 6. Response of AD7118 with AD544S In conventional CMOS D/A converter design parasitic capacitance in the N-channel D/A converter switches can give rise to glitches on the D/A converter output. These glitches re- sult from digital feedthrough. The AD7118 has been designed to minimize these glitches as much as possible. It is recom- mended that for minimum glitch energy the AD7118 be oper- ated with VDD = 5 V. This will reduce the available energy for coupling across the parasitic capacitance. It should be noted that the accuracy of the AD7118 improves as VDD is increased (see Figure 8) but the device maintains monotonic behavior to at least –66 dB in the range 5 ≤ V DD ≤ 15 volts. For operation beyond 250 kHz, capacitor C1 may be reduced in value. This gives an increase in bandwidth at the expense of a poorer transient response as shown in Figures 6 and 11. In cir- cuits where C1 is not included the high frequency roll-off point is primarily determined by the characteristics of the output am- plifier and not the AD7118. Feedthrough and absolute accuracy for attenuation levels be- yond 42 dB are sensitive to output leakage current effects. For this reason it is recommended that the operating temperature of the AD7118 be kept as close to 25 °C as is practically possible, particularly where the device’s performance at high attenuation levels is important. A typical plot of leakage current vs. tempera- ture is shown in Figure 10. Some solder fluxes and cleaning materials can form slightly con- ductive films which cause leakage effects between analog input and output. The user is cautioned to ensure that the manufac- turing process for circuits using the AD7118 does not allow such films to form. Otherwise the feedthrough, accuracy and maximum usable range will be affected. STATIC ACCURACY PERFORMANCE The D/A converter section of the AD7118 consists of a 17-bit R-2R type converter. To obtain optimum static performance at this level of resolution it is necessary to pay great attention to amplifier selection, circuit grounding, etc. Amplifier input bias current results in a dc offset at the output of the amplifier due to the current flowing through the feedback resistor RFB. It is recommended that an amplifier with an input bias current of less than 10 nA be used (e.g., AD517 or AD544) to minimize this offset. Another error arises from the output amplifier’s input offset voltage. The amplifier is operated with a fixed feedback resis- tance, but the equivalent source impedance (the AD7118 out- put impedance) varies as a function of attenuation level. This has the effect of varying the “noise” gain of the amplifier, thus creating a varying error due to amplifier offset voltage. To achieve an output offset error less than one half the smallest step size, it is recommended that an amplifier with less than 50 µV of input offset be used (such as the AD517 or AD OP07). If dc accuracy is not critical in the application, it should be noted that amplifiers with offset voltage up to approximately 2 millivolts can be used. Amplifiers with higher offset voltage may cause audible “thumps” due to dc output changes. The AD7118 accuracy is specified and tested using only the internal feedback resistor. It is not recommended that “gain” trim resistors be used with the AD7118 because the internal logic of the circuit executes a proprietary algorithm which ap- proximates a logarithmic curve with a binary D/A converter: as a result no single point on the attenuator transfer function can be guaranteed to lie exactly on the theoretical curve. Any “gain- error” (i.e., mismatch of RFB to the R-2R ladder) that may exist in the AD7118 D/A converter circuit results in a constant attenuation error over the whole range. Since the gain error of CMOS multiplying D/A converters is normally less than 1%, the accuracy error contribution due to “gain error” effects is normally less than 0.09 dB. Applications Information– |
Podobny numer części - AD7118 |
|
Podobny opis - AD7118 |
|
|
Link URL |
Polityka prywatności |
ALLDATASHEET.PL |
Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |