Zakładka z wyszukiwarką danych komponentów |
|
AD722JR-16-REEL Arkusz danych(PDF) 10 Page - Analog Devices |
|
AD722JR-16-REEL Arkusz danych(HTML) 10 Page - Analog Devices |
10 / 12 page REV. 0 –10– AD722 Figure 15 shows a circuit for connection to the VGA port of a PC. The RGB outputs connect directly to the respective inputs of the AD722. These signals should each be terminated to ground with 75 Ω. The standard 15-pin VGA connector has HSYNC on Pin 13 and VSYNC on Pin 14. These signals also connect directly to the same name signals on the AD722. The FIN signal can be provided by any of the means described elsewhere in the data sheet. For a synchronous NTSC system, the internal 4FSC (14.31818 MHz) clock that drives the VGA controller can be used for FIN on the AD722. This signal is not directly accessible from outside the computer, but it does appear on the VGA card. If a separate RGB monitor is also to be used, it is not possible to simply connect it to the R, G, and B signals. The monitor pro- vides a termination that would double terminate these signals. The R, G, and B signals should be buffered by three amplifiers with high input impedances. These should be configured for a gain of two, which is normalized by the divide by two termina- tion scheme used for the RGB monitor. The AD813 is a triple video amplifier that can provide the nec- essary buffering in a single package. It also provides a disable pin for each amplifier which can be used to disable the drive to the RGB monitor when interlaced video is used (SELECT = LO). When the RGB signals are noninterlaced, setting SELECT HI will enable the AD813 to drive the RGB monitor and disable the en- coding function of the AD722 via Pin 5. HSYNC and VSYNC are logic level signals that can drive both the AD722 and RGB monitor in parallel. AD722 Used with an MPEG Decoder MPEG decoding of compressed video signals is becoming a more prevalent feature in many PC systems. To display images on the computer monitor, video in RGB format is required. However, to display the images on a TV monitor or to record the images on a VCR, video in composite format is required. Figure 16 shows a schematic for taking the 24-bit wide RGB video from an MPEG decoder and creating both analog RGB video and composite video. The 24-bit wide RGB video is converted to analog RGB by the ADV7120 (Triple 8-bit video DAC–available in 48-pin TQFP). The analog current outputs from the DAC are terminated to ground at both ends with 75 Ω as called for in the data sheet. These signals directly feed the analog inputs of the AD722. The HSYNC and VSYNC signals from the MPEG Controller are di- rectly applied to the AD722. If the set of termination resistors closest to the AD722 are re- moved, an RGB monitor can be connected to these signals and it will provide the required second termination. This scenario is acceptable as long as the RGB monitor is always present and connected. If it is to be removed on occasion, another termina- tion scheme is required. The AD813 triple video op amp can provide buffering for such applications. Each channel is set for a gain of two while the out- puts are back terminated with a series 75 Ω resistor. This pro- vides the proper signal levels at the monitor which terminates the lines with 75 Ω. AD722 APPLICATION DISCUSSION Chrominance and Luminance Alignment Inside the AD722 the chrominance and luminance signals are pro- cessed by separate paths. They both are either output separately (Y/C), or they are added together by the composite video ampli- fier. Although both channels are filtered, the chrominance signal experiences a greater filtering delay due to the higher order of the chrominance path filters. To compensate, a sampled delay line is used in the luminance path. For baseband video it is desirable for the chrominance and lu- minance to be accurately aligned with zero offset. However, the situation for modulated RF video is a bit more complicated due to the effects of the IF circuitry used in TV sets. Figure 16. AD722 and ADV7120/ADV7122 Providing MPEG Video Solution 13 2 FIN AGND DGND 15 16 HSYNC VSYNC HSYNC VSYNC 9 COMP + 75 Ω 220µF COMPOSITE VIDEO 10 11 CRMA LUMA + 75 Ω 220µF + 75 Ω 220µF S-VIDEO 12 1 10k Ω 5 AD722 ENCD SELECT STND APOS DPOS 0.1µF 0.01µF 10–30pF L1 (FERRITE BEAD) +5V (VAA) 10µF 33µF +5V (VCC) GND ADV7120 SYNC CLOCK BLANK GND 24 DATA IN HSYNC VSYNC +5V (VAA) 10k Ω +5V 10k Ω 0.1µF 0.01µF RSET 550 Ω 0.1µF +5V VAA VREF FSADJ COMP 0.1µF +5V (VAA) 8 RIN GIN BIN 75 Ω 75 Ω 75 Ω IOG IOR IOB 3 MPEG DECODER 6 7 +5V 10k Ω AD589 (1.2V REF) 14 4 +5V OSC 0.1µF +5V CRYSTAL 75 Ω 75 Ω 75 Ω * PARALLEL–RESONANT CRYSTAL; 3.579545MHz (NTSC) OR 4.433620MHz (PAL) CAPACITOR VALUE DEPENDS ON CRYSTAL CHOSEN **FSC OR 4FSC CLOCK; 3.579545MHz, 14.31818MHz (NTSC) OR 4.433620MHZ, 17.734480MHz(PAL) ** * |
Podobny numer części - AD722JR-16-REEL |
|
Podobny opis - AD722JR-16-REEL |
|
|
Link URL |
Polityka prywatności |
ALLDATASHEET.PL |
Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |