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AD7226BQ Arkusz danych(PDF) 9 Page - Analog Devices

Numer części AD7226BQ
Szczegółowy opis  LC2MOS Quad 8-Bit D/A Converter
Download  12 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD7226BQ Arkusz danych(HTML) 9 Page - Analog Devices

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AD7226
REV. A
–9–
Figure 14. AGND Bias Circuit
For a given VIN, increasing AGND above system GND will re-
duce the effective VDD–VREF which must be at least 4 V to en-
sure specified operation. Note that because the AGND pin is
common to all four DACs, this method biases up the output
voltages of all the DACs in the AD7226. Note that VDD and VSS
of the AD7226 should be referenced to DGND.
3-PHASE SINE WAVE
The circuit of Figure 15 shows an application of the AD7226 in
the generation of 3-phase sine waves which can be used to con-
trol small 3-phase motors. The proper codes for synthesizing a
full sine wave are stored in EPROM, with the required phase-
shift of 120
° between the three D/A converter outputs being
generated in software.
Data is loaded into the three D/A converters from the sine
EPROM via the microprocessor or control logic. Three loops
are generated in software with each D/A converter being loaded
from a separate loop. The loops run through the look-up table
producing successive triads of sinusoidal values with 120
° sepa-
ration which are loaded to the D/A converters producing 3 sine
wave voltages 120
° apart. A complete sine wave cycle is gener-
ated by stepping through the full look-up table. If a 256-element
sine wave table is used then the resolution of the circuit will be
1.4
° (360°/256). Figure 17 shows typical resulting waveforms.
The sine waves can be smoothed by filtering the D/A converter
outputs.
The fourth D/A converter of the AD7226, DAC D, may be used
in a feedback configuration to provide a programmable refer-
ence voltage for itself and the other three converters. This con-
figuration is shown in Figure 15. The relationship of VREF to VIN
is dependent upon digital code and upon the ratio of RF to R
and is given by the formula
V
REF =
(1
+ G)
(1
+ G.D
D )
⋅V
IN
where G = RF/R
and DD is a fractional representation of the digital word
in latch D.
Alternatively, for a given VIN and resistance ratio, the required
value of DD for a given value of VREF can be determined from
the expression
D
D = (1 + R / RF ) ⋅
V
IN
V
REF
R
R
F
Figure 16 shows typical plots of VREF versus digital code for
three different values of RF. With VIN = +2.5 V and RF = 3 R
the peak-to-peak sine wave voltage from the converter outputs
will vary between +2.5 V and +10 V over the digital input code
range of 0 to 255.
Figure 16. Variation of VREF with Feedback Configuration
Figure 17. 3-Phase Sine Wave Output
Figure 15. 3-Phase Sine Wave Generation Circuit


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