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AD7225LR Arkusz danych(PDF) 8 Page - Analog Devices |
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AD7225LR Arkusz danych(HTML) 8 Page - Analog Devices |
8 / 12 page AD7225 REV. B –8– SPECIFICATION RANGES For the AD7225 to operate to rated specifications, its input ref- erence voltage must be at least 4 V below the VDD power supply voltage. This voltage differential is the overhead voltage re- quired by the output amplifiers. The AD7225 is specified to operate over a VDD range from +12 V ± 5% to +15 V ±10% (i.e., from +11.4 V to +16.5 V) with a VSS of –5 V ± 10%. Operation is also specified for a single +15 V ± 5% V DD supply. Applying a VSS of –5 V results in im- proved zero code error, improved output sink capability with outputs near AGND and improved negative going settling time. Performance is specified over a wide range of reference voltages from 2 V to (VDD – 4 V) with dual supplies. This allows a range of standard reference generators to be used such as the AD580, a +2.5 V bandgap reference and the AD584, a precision +10 V reference. Note that an output voltage range of 0 V to +10 V re- quires a nominal +15 V ± 5% power supply voltage. UNIPOLAR OUTPUT OPERATION This is the basic mode of operation for each channel of the AD7225, with the output voltage having the same positive polarity as VREF. The AD7225 can be operated single supply (VSS = AGND) or with positive/negative supplies (see op-amp section which outlines the advantages of having negative VSS). Connections for the unipolar output operation are shown in Fig- ure 13. The voltage at any of the reference inputs must never be negative with respect to DGND. Failure to observe this precau- tion may cause parasitic transistor action and possible device de- struction. The code table for unipolar output operation is shown in Table III. Figure 13. Unipolar Output Circuit Table III. Unipolar Code Table DAC Latch Contents MSB LSB Analog Output 1 1 1 1 1 1 1 1 +V REF 255 256 1 0 0 0 0 0 0 1 +V REF 129 256 1 0 0 0 0 0 0 0 +V REF 128 256 =+ V REF 2 0 1 1 1 1 1 1 1 +V REF 127 256 0 0 0 0 0 0 0 1 +V REF 1 256 0 0 0 0 0 0 0 0 0 V Note: 1 LSB = V REF () 2−8 ()=V REF 1 256 BIPOLAR OUTPUT OPERATION Each of the DACs of the AD7225 can be individually config- ured to provide bipolar output operation. This is possible using one external amplifier and two resistors per channel. Figure 14 shows a circuit used to implement offset binary coding (bipolar operation) with DAC A of the AD7225. In this case V OUT = 1 + R2 R1 ⋅ D AV REF () – R2 R1 ⋅ V REF () With R1 = R2 VOUT = (2 DA – 1) • VREF where DA is a fractional representation of the digital word in latch A. (0 ≤ D A ≤ 255/256) Mismatch between R1 and R2 causes gain and offset errors and, therefore, these resistors must match and track over tempera- ture. Once again the AD7225 can be operated in single supply or from positive/negative supplies. Table IV shows the digital code versus output voltage relationship for the circuit of Figure 14 with R1 = R2. |
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