Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

AD7249AN Arkusz danych(PDF) 7 Page - Analog Devices

Numer części AD7249AN
Szczegółowy opis  LC2MOS Dual 12-Bit Serial DACPORT
Download  12 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

AD7249AN Arkusz danych(HTML) 7 Page - Analog Devices

Back Button AD7249AN Datasheet HTML 3Page - Analog Devices AD7249AN Datasheet HTML 4Page - Analog Devices AD7249AN Datasheet HTML 5Page - Analog Devices AD7249AN Datasheet HTML 6Page - Analog Devices AD7249AN Datasheet HTML 7Page - Analog Devices AD7249AN Datasheet HTML 8Page - Analog Devices AD7249AN Datasheet HTML 9Page - Analog Devices AD7249AN Datasheet HTML 10Page - Analog Devices AD7249AN Datasheet HTML 11Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 12 page
background image
AD7249
REV. C
–7–
DIGITAL INTERFACE
The AD7249 contains an input serial to parallel shift register
and a DAC latch for both DAC A and DAC B. A simplified
diagram of the input loading circuitry is shown in Figure 7.
Serial data on the SDIN input is loaded to the input register
under control of
SYNC and SCLK. The SYNC input provides
the frame synchronization signal which tells the AD7249 that
valid serial data on the SDIN input will be available for the next
16 falling edges of SCLK. An internal counter/decoder circuit
provides a low gating signal so that only 16 data bits are clocked
into the input shift register. After 16 SCLK pulses the internal
gating signal goes inactive (high) thus locking out any further
clock pulses. Therefore either a continuous clock or a burst
clock source may be used to clock in the data. The
SYNC input
is taken high after the complete 16-bit word is loaded in.
DAC selection is accomplished using the thirteenth bit (DB12)
of the serial data input stream. A zero in DB12 will select DAC
A while a one in this position selects DAC B. Although 16 bits
of data are clocked into the input register, only 12 bits get trans-
ferred into the DAC latch. The relevant DAC latch is deter-
mined by the value of the thirteenth bit and the first three bits
in the 16-bit stream are don’t cares. Therefore, the data format
is three don’t cares followed by the DAC selection bit and the
12-bit data word with the LSB as the last bit in the serial
stream.
There are two ways in which a DAC latches and hence the
analog outputs may be updated. The status of the
LDAC input
is examined after
SYNC is taken low. Depending on its status,
one of two update modes are selected.
If
LDAC = 0, then the automatic update mode is selected. In
this mode the DAC latch and analog output are updated auto-
matically when the last bit in the serial data stream is clocked in.
The update thus takes place on the sixteenth falling SCLK edge.
If
LDAC = 1, then the automatic update is disabled and both
DAC latches are updated by taking
LDAC low any time after
the 16-bit data transfer is complete. The update now occurs on
the falling edge of
LDAC. Note that the LDAC input must be
taken back high again before the next data transfer is initiated.
When a complete word is held in the shift register it may then
be loaded into the DAC latch under control of
LDAC.
Clear Function (
CLR)
The clear function clears the contents of the input shift register
and loads both DAC latches with all 0s. It is activated by taking
CLR low. In all ranges except the Offset Binary bipolar range
(–5 V to +5 V) the output voltage is reset to 0 V. In the offset
binary bipolar range the output is set to –REFIN. The clear
function is especially useful at power-up as it enables the output
to be reset to a known state.
SYNC
SCLK
SDIN
LDAC
CLR
GATING
SIGNAL
RESET
/16
COUNTER/
DECOUNTER
DECODER
AUTO-UPDATE
CIRCUITRY
CLK A
SDATA
CLK B
DAC LATCH A (12-BITS)
DAC LATCH B (12-BITS)
SHIFT REGISTER A
SHIFT REGISTER B
Figure 7. Simplified Loading Structure


Podobny numer części - AD7249AN

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
AD7249AN AD-AD7249AN Datasheet
319Kb / 14P
   LC2MOS Dual 12-Bit Serial DACPORT짰
REV. D
AD7249ANZ AD-AD7249ANZ Datasheet
319Kb / 14P
   LC2MOS Dual 12-Bit Serial DACPORT짰
REV. D
More results

Podobny opis - AD7249AN

ProducentNumer częściArkusz danychSzczegółowy opis
logo
Analog Devices
AD7243 AD-AD7243 Datasheet
171Kb / 12P
   LC2MOS 12-Bit Serial DACPORT
REV. A
AD7243ANZ AD-AD7243ANZ Datasheet
161Kb / 12P
   LC2MOS 12-Bit Serial DACPORT
REV. A
AD7243ARZ AD-AD7243ARZ Datasheet
161Kb / 12P
   LC2MOS 12-Bit Serial DACPORT
REV. A
AD7243 AD-AD7243_V01 Datasheet
282Kb / 13P
   LC2MOS 12-Bit Serial DACPORT
Rev. B
AD7247AAR-REEL AD-AD7247AAR-REEL Datasheet
1Mb / 12P
   LC2MOS Dual 12-Bit DACPORT
REV. A
AD7247AARZ AD-AD7247AARZ Datasheet
1Mb / 12P
   LC2MOS Dual 12-Bit DACPORT
REV. A
AD7237 AD-AD7237 Datasheet
1Mb / 7P
   LC2MOS DUAL 12-BIT DACPORT
REV. A
AD7245JNZ AD-AD7245JNZ Datasheet
3Mb / 16P
   LC2MOS 12-BiT DACPORT
AD7233 AD-AD7233 Datasheet
99Kb / 8P
   LC2MOS 12-Bit Serial Mini-DIP DACPORT
REV. A
AD7233ANZ AD-AD7233ANZ Datasheet
95Kb / 8P
   LC2MOS 12-Bit Serial Mini-DIP DACPORT
REV. B
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12


Arkusz danych Pobierz

Go To PDF Page


Link URL




Polityka prywatności
ALLDATASHEET.PL
Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com