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AD7243BQ Arkusz danych(PDF) 11 Page - Analog Devices |
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AD7243BQ Arkusz danych(HTML) 11 Page - Analog Devices |
11 / 12 page REV. A –11– AD7243 Common clock, data, and synchronization signals are applied to all DACs in the chain. The loading sequence starts by taking SYNC low. The data is then clocked into the input registers on the falling edge of SCLK. Sixteen clock pulses are required for each DAC in the chain. The data ripples through the input reg- isters with the first 16-bit word filling the last register in the chain after 16N clock pulses where N = the total number of DACs in the chain. When valid data has been loaded into all the registers, the SYNC input should be taken high and a common LDAC pulse used to update all the DACs simultaneously. APPLICATIONS OPTO-ISOLATED INTERFACE In many process control type applications it is necessary to pro- vide an isolation barrier between the controller and the unit be- ing controlled. Opto-isolators can provide voltage isolation in excess of 3 kV. The serial loading structure of the AD7243 makes it ideal for opto-isolated interfaces as the number of in- terface lines is kept to a minimum. Figure 17 shows a 4-channel isolated interface using the AD7243. The DCEN pin must be connected high to enable the daisy-chain facility. Four channels with 12-bit resolution are provided in the circuit shown, but this may be expanded to ac- commodate any number of DAC channels without any extra isolation circuitry. The sequence of events to program the output channels is as follows: 1. Take the SYNC line low. 2. Transmit the data as four 16-bit words. A total of 64 clock pulses is required to clock the data through the chain. 3. Take the SYNC line high. 4. Pulse the LDAC line low. This updates all output channels simultaneously on the falling edge of LDAC. To reduce the number of opto-couplers, the LDAC line could be driven from a one shot which is triggered by the rising edge on the SYNC line. A low level pulse of 50 ns duration or greater is all that is required to update the outputs. SCLK AD7243* SYNC LDAC SDIN DCEN SDO SCLK AD7243* SYNC LDAC SDIN DCEN SDO SCLK AD7243* SYNC LDAC SDIN DCEN SDO SCLK AD7243* SYNC LDAC SDIN DCEN SDO VOUT *ADDITIONAL PINS OMITTED FOR CLARITY DATA OUT CLOCK OUT SYNC OUT CONTROL OUT CONTROLLER VDD VOUT(A) QUAD OPTO-COUPLER VDD VDD VDD VDD VDD VDD VDD VOUT(B) VOUT(C) VOUT(D) VOUT VOUT VOUT Figure 17. Four-Channel Opto-lsolated Interface |
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