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AD7249BR Arkusz danych(PDF) 3 Page - Analog Devices |
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AD7249BR Arkusz danych(HTML) 3 Page - Analog Devices |
3 / 12 page AD7249 REV. C –3– TIMING CHARACTERISTICS1, 2 Limit at TMIN to TMAX Parameter (All Versions) Unit Conditions/Comments t1 4 200 ns min SCLK Cycle Time t2 15 ns min SYNC to SCLK Falling Edge Setup Time t3 50 ns min SYNC to SCLK Hold Time t4 0 ns min Data Setup Time t5 150 ns min Data Hold Time t6 0 ns min SYNC High to LDAC Low t7 20 ns min LDAC Pulsewidth t8 0 ns min LDAC High to SYNC Low t9 50 ns min CLR Pulsewidth t10 20 ns min SYNC High Time NOTES 1Timing specifications guaranteed by design not production tested. All input signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V. 2See Figure 8. 3Power supply tolerance, A Version: ± 10%; B, S Versions: ± 5%. 4SCLK Mark/Space Ratio range is 45/55 to 55/45. (VDD = +12 V to +15 V, 3 V SS = 0 V or –12 V to –15 V, 3 AGND = DGND = 0 V, R L = 2 k , CL = 100 pF. All specifications TMIN to TMAX unless otherwise noted.) ABSOLUTE MAXIMUM RATINGS 1 (TA = +25 °C unless otherwise noted) VDD to AGND, DGND . . . . . . . . . . . . . . . . . . –0.3 V to +17 V VSS to AGND, DGND . . . . . . . . . . . . . . . . . . +0.3 V to –17 V AGND to DGND . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V VOUTA, B 2 to AGND . . . . . . . . . . . . V SS – 0.3 V to VDD + 0.3 V REFOUT to AGND . . . . . . . . . . . . . . . . . . . . . . . . 0 V to VDD REFIN to AGND . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V Digital Inputs to DGND . . . . . . . . . . . . –0.3 V to VDD + 0.3 V Operating Temperature Range Industrial (A, B Versions) . . . . . . . . . . . . . . –40 °C to +85°C Extended (S Version) . . . . . . . . . . . . . . . . . –55 °C to +125°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150 °C Storage Temperature Range . . . . . . . . . . . . . –65 °C to +150°C Power Dissipation Plastic DIP . . . . . . . . . . . . . . . . . . . 600 mW θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . +117°C/W Lead Temperature (Soldering, 10 secs) . . . . . . . . . . +300 °C Power Dissipation, Cerdip . . . . . . . . . . . . . . . . . . . . . . 600 mW θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 76°C/W Lead Temperature (Soldering, 10 secs) . . . . . . . . . . +300 °C Power Dissipation, SOIC . . . . . . . . . . . . . . . . . . . . . . . 600 mW θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 75°C/W Lead Temperature (Soldering) Vapor Phase (60 secs) . . . . . . . . . . . . . . . . . . . . . . +215 °C Infrared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . . . +220 °C NOTES 1Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one Absolute Maximum Rating may be applied at any time. 2The outputs may be shorted to voltages in this range provided the power dissipation of the package is not exceeded. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7249 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE |
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