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AD9051 Arkusz danych(PDF) 3 Page - Analog Devices |
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AD9051 Arkusz danych(HTML) 3 Page - Analog Devices |
3 / 12 page –3– REV. A AD9051 Test AD9051BRS AD9051BRS-2V Parameter Temp Level Min Typ Max Min Typ Max Units ENCODE INPUT Logic “1” Voltage Full VI 2.0 2.0 V Logic “0” Voltage Full VI 0.8 0.8 V Logic “1” Current Full VI 1 1 µA Logic “0” Current Full VI 1 1 µA Input Capacitance +25 °CV 7.5 7.5 pF Encode Pulsewidth High (t EH) +25 °CIV 7.5 7.5 ns Encode Pulsewidth Low (t EL) +25 °CIV 7.5 7.5 ns DIGITAL OUTPUTS Logic “1” Voltage (5.0 V DD) Full VI 4.95 4.95 V Logic “0” Voltage (5.0 V DD) Full VI 0.05 0.05 V Logic “1” Voltage (3.0 V DD) Full VI 2.95 2.95 V Logic “0” Voltage (3.0 V DD) Full VI 0.05 0.05 V Output Coding 7 Offset Binary Offset Binary POWER SUPPLY V D, VDD Supply Current Full VI 50 63 50 63 mA Power Dissipation 8 Full VI 250 315 250 315 mW Power Supply Rejection Ratio (PSRR) 9 +25 °CI ±2 ±10 ±7 ±15 mV/V NOTES 1Gain error and gain temperature coefficient are based on the ADC only (with a fixed +2.5 V external reference). 2Contact factory or authorized sales agent for information concerning the availability of expanded input voltage range devices. 33 dB bandwidth with full-power input signal. 4Minimum conversion rate at which all data sheet specifications remain stable. 5t V and tPD are measured from the threshold crossing of the ENCODE input to valid TTL levels 0.5 V and 2.4 V of the digital outputs with V DD = 3.0 V. The output ac load during test is 5 pF. 6SNR/harmonics tested with an analog input voltage of –0.5 dBfs. All tests performed at 60 MSPS. 7Contact factory or authorized sales agent for information concerning the availability of alternative output coding and input range devices. 8Power dissipation is measured under the following conditions: analog input = –FS at 60 MSPS ENCODE. 9A change in input offset voltage with respect to a change in V D. Specifications subject to change without notice. |
Podobny numer części - AD9051 |
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Podobny opis - AD9051 |
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