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AD9058JJ Arkusz danych(PDF) 5 Page - Analog Devices |
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AD9058JJ Arkusz danych(HTML) 5 Page - Analog Devices |
5 / 8 page REV. B AD9058 –5– THEORY OF OPERATION The AD9058 contains two separate 8-bit analog-to-digital con- verters (ADCs) on a single silicon die. The two devices can be operated independently with separate analog inputs, voltage references and clocks. In a traditional flash converter, 256 input comparators are required to make the parallel conversion for 8-bit resolution. This is in marked contrast to the scheme used in the AD9058, as shown in Figure 1. Unlike traditional “flash,” or parallel, converters, each of the two ADCs in the AD9058 utilizes a patented interpolating archi- tecture to reduce circuit complexity, die size and input capacitance. These advantages accrue because, compared to a conventional flash design, only half the normal number of input comparator cells is required to accomplish the conversion. In this unit, each of the two independent ADCs uses only 128 (2 7) comparators to make the conversion. The conversion for the seven most significant bits (MSBs) is performed by the 128 comparators. The value of the least significant bit (LSB) is determined by interpolation between adjacent comparators in the decoding register. A proprietary decoding scheme processes the comparator outputs and provides an 8-bit code to the output register of each ADC; the scheme also minimizes error codes. Analog input range is established by the voltages applied at the voltage reference inputs (+VREF and –VREF). The AD9058 can operate from 0 V to +2 V using the internal voltage reference, or anywhere between –1 V and +2 V using external references. Input range is limited to 2 V p-p when using external references. The internal resistor ladder divides the applied voltage reference into 128 steps, with each step representing two 8-bit quantiza- tion levels. 2 1 256 8 8 128 127 ANALOG IN –VREF +VREF Figure 1. AD9058 Comparator Block Diagram The onboard voltage reference, +VINT, is a bandgap reference which has sufficient drive capability for both reference ladders. It provides a +2 V reference that can drive both ADCs in the AD9058 for unipolar positive operation (0 V to +2 V). USING THE AD9058 Refer to Figure 2. Using the internal voltage reference con- nected to both ADCs as shown reduces the number of external components required to create a complete data acquisition sys- tem. The input ranges of the ADCs are positive unipolar in this configuration, ranging from 0 V to +2 V. Bipolar input signals are buffered, amplified and offset into the proper input range of the ADC using a good low distortion amplifier such as the AD9617 or AD9618. 18 28 ENCODE A ENCODE B 3 43 8 38 10pF 1k 74HCT04 50 5, 9, 22, 24, 37, 41 +5V D0B (LSB) D7B (MSB) 8 8 CLOCK CLOCK –VS 7, 20, 26, 39 0.1µF 1N4001 4,19, 21 25, 27, 42 ENCODE 10 36 AD9058 ANALOG IN B ±0.5 V AD9617 400 200 5 ANALOG IN A ±0.5 V 0.1µF AD9617 400 200 5 20k 20k 800 AD707 800 6 2 +VINT COMP 1 0.1µF 0.1µF +2V 40 (J-LEAD) 2V – + – + – + – 5V – 17 16 15 14 13 12 11 29 30 31 32 33 34 35 (SEE TEXT) +VS D0A (LSB) D7A (MSB) +VREF A +VREF B AIN A –VREF A –VREF B AIN B Figure 2. AD9058 Using Internal +2 V Voltage Reference |
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