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AD9058JD Arkusz danych(PDF) 2 Page - Analog Devices |
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AD9058JD Arkusz danych(HTML) 2 Page - Analog Devices |
2 / 8 page REV. B –2– AD9058–SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS 1 Analog Input . . . . . . . . . . . . . . . . . . . . . . . . . –1.5 V to +2.5 V +VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6 V –VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.8 V to –6 V 2 Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to +VS Digital Output Current . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Voltage Reference Current . . . . . . . . . . . . . . . . . . . . . . .53 mA +VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2.5 V –VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.5 Operating Temperature Range AD9058JD/JJ/KD/KJ . . . . . . . . . . . . . . . . . . . 0 °C to +70°C Maximum Junction Temperature 3 AD9058JD/JJ/KD/KJ . . . . . . . . . . . . . . . . . . . . . . . . +175 °C Storage Temperature Range . . . . . . . . . . . . –65 °C to +150°C Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . +300 °C ELECTRICAL CHARACTERISTICS [ VS = 5 V; VREF = +2 V (internal); ENCODE = 40 MSPS; AIN = 0 V to +2 V; –VREF = GROUND, unless otherwise noted.]2 All specifications apply to either of the two ADCs Test AD9058JD/JJ AD9058KD/KJ Parameter (Conditions) Temp Level Min Typ Max Min Typ Max Unit RESOLUTION 8 8 Bits DC ACCURACY Differential Nonlinearity +25 °C I 0.25 0.65 0.25 0.5 LSB Full VI 0.8 0.7 LSB Integral Nonlinearity +25 °C I 0.5 1.3 0.5 1.0 LSB Full VI 1.4 1.25 LSB No Missing Codes Full VI GUARANTEED GUARANTEED ANALOG INPUT Input Bias Current +25 °C I 75 170 75 170 µA Full VI 340 340 µA Input Resistance +25 °C I 12 28 12 28 k Ω Input Capacitance +25 °C IV 1015 1015 pF Analog Bandwidth +25 °C V 175 175 MHz REFERENCE INPUT Reference Ladder Resistance +25 °C I 120 170 220 120 170 220 Ω Full VI 80 270 80 270 Ω Ladder Tempco Full V 0.45 0.45 Ω/°C Reference Ladder Offset +25 °CI 8 16 8 16 mV (Top) Full VI 24 24 mV Reference Ladder Offset +25 °CI 8 23 8 23 mV (Bottom) Full VI 33 33 mV Offset Drift Coefficient Full V 50 50 µV/°C INTERNAL VOLTAGE REFERENCE Reference Voltage +25 °C I 1.95 2.0 2.20 1.95 2.0 2.20 V Full VI 1.90 2.25 1.90 2.25 V Temperature Coefficient Full V 150 150 µV/°C Power Supply Rejection Ratio (PSRR) +25 °C I 10 25 10 25 mV/V SWITCHING PERFORMANCE Maximum Conversion Rate 4 +25 °C I 50 50 60 MSPS Aperture Delay (tA) +25 °C IV 0.1 0.8 1.5 0.1 0.8 1.5 ns Aperture Delay Matching +25 °C IV 0.2 0 5 0.2 0.5 ns Aperture Uncertainty (Jitter) +25 °C V 10 10 ps, rms Output Delay (Valid) (tV) 4 +25 °CI 8 5 8 ns Output Delay (tV) Tempco Full V 16 16 ps/ °C Propagation Delay (tPD) 4 +25 °C I 12 12 19 ns Propagation Delay (tPD) Tempco Full V –16 –16 ps/ °C Output Time Skew +25 °CV 1 1 ns ENCODE INPUT Logic “1” Voltage Full VI 2 2 V Logic “0” Voltage Full VI 0.8 0.8 V Logic “1” Current Full VI 600 600 µA Logic “0” Current Full VI 1000 1000 µA Input Capacitance +25 °CV 5 5 pF Pulsewidth (High) +25 °CI 8 8 ns Pulsewidth (Low) +25 °CI 8 8 ns |
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