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AD9070 Arkusz danych(PDF) 10 Page - Analog Devices |
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AD9070 Arkusz danych(HTML) 10 Page - Analog Devices |
10 / 16 page AD9070 –10– REV. B Figure 19 shows typical connections for the analog inputs when using the AD9070 in a dc-coupled system with single-ended signals. The AD820 is used to offset the ground referenced input signal to the level required by the AD9070. A very high performance amplifier, such as the AD9631, is required to avoid degrading the analog signal presented to the ADC. A buffered ac interface is easily implemented, with even fewer components (Figure 20). AD9070 VEE –5V GND 1k RT VIN 0.5V AIN AIN VREF OUT VREF IN –5V –5V +5V AD9631 350 AD820 1k 0.1 F 350 1k 0.1 F 0.1 F Figure 19. DC-Coupled Input AD9070 0.1 F VEE –5V GND 350 RT VIN 1Vp-p AIN AIN VREF OUT VREF IN –5V +5V AD9631 350 500 0.1 F 0.1 F 500 0.1 F Figure 20. AC-Coupled Input Special care was taken in the design of the analog input section of the AD9070 to prevent damage and corruption of data when the input is overdriven. The nominal input range is –1.988 V to –3.012 V (1.024 V p–p centered at –2.5 V). Out-of-range comparators detect when the analog input signal is out of this range and set the OR output signal HIGH. The digital outputs are locked at plus or minus full scale (1FFh or 200h) for voltages that are out of range but between –1 V and –5 V. Input voltages outside of this range may result in invalid codes at the ADCs output. When the analog input signal returns to the nominal range, the out-of-range comparators return the ADC to its active mode and the device recovers in approximately 3 ns. The input is protected to one volt outside of the power supply rails. For nominal power (–5 V and ground), the analog input will not be damaged with signals ranging from –6.0 V to +1.0 V. Voltage Reference A stable and accurate –2.5 V voltage reference is built into the AD9070 (VREF OUT) in the SOIC (BR) package. In normal operation, the internal reference is used by strapping Pins 3 and 4 of the AD9070 together. The internal reference can provide 100 µA of extra drive current that may be used for other circuits. Some applications may require greater accuracy, improved temperature performance or adjustment of the gain of the AD9070, which cannot be obtained by using the internal reference. For these applications, an external –2.5 V reference can be connected to VREF IN, which requires 5 µA of drive current (Figure 21). AD9070 VEE –5V GND VREF OUT VREF IN –5V 1.25k 0.1 F NC GND +VIN VOUT AD780 Figure 21. Using the AD780 Voltage Reference The input range can be adjusted by varying the reference voltage applied to the AD9070. No appreciable degradation in performance occurs when the reference is adjusted ±4%. The full-scale range of the ADC tracks reference voltage changes linearly. Timing The performance of the AD9070 is insensitive to the duty cycle of the clock over a wide range of operating conditions: pulse width variations of as much as ±20% will cause no degradation in performance (see Figure 15). The AD9070 provides latched data outputs, with three pipeline delays. Data outputs are available one propagation delay (tPD) after the rising edge of the encode command (Figure 1). The length of the output data lines and loads placed on them should be minimized to reduce transients within the AD9070; these transients can detract from the converter’s dynamic performance. The minimum guaranteed conversion rate of the AD9070 is 40 MSPS. At clock rates below 40 MSPS, dynamic performance may degrade. The AD9070 will operate in bursts, but the user must flush the internal pipeline each time the clock restarts. Valid data will be produced on the fourth rising edge of the ENCODE signal after the clock is restarted. |
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