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AD9071 Arkusz danych(PDF) 2 Page - Analog Devices |
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AD9071 Arkusz danych(HTML) 2 Page - Analog Devices |
2 / 12 page –2– REV. B AD9071–SPECIFICATIONS (VCC = +5 V, VDD = +3.3 V, Differential Analog Input, ENCODE = 100 MSPS unless otherwise noted) Test AD9071BR Parameter Temp Level Min Typ Max Units RESOLUTION 10 Bits DC ACCURACY Differential Nonlinearity1 +25 °CI ±0.8 +1.5/–1.0 LSB Full VI ±1.0 +1.75/–1.0 LSB Integral Nonlinearity 1 +25 °CI ±0.8 ±1.5 LSB Full VI ±1.25 ±1.75 LSB No Missing Codes 1 +25 °C I Guaranteed Gain Error 2 +25 °CI ±1 ±4% FS Full VI ±2 ±8% FS Gain Tempco 2 Full V 150 ppm/ °C ANALOG INPUT Input Voltage Range (With Respect to AIN) Full V ±512 mV p-p Common-Mode Voltage Full V –2.5 ± 0.2 V Input Offset Voltage +25 °CI ±4 ±18 mV Full VI ±5 ±20 mV Input Resistance Full VI 15 35 k Ω Input Capacitance +25 °CV 3 pF Input Bias Current +25 °C I 55 90 µA Full VI 65 115 µA Analog Bandwidth, Full Power +25 °C V 280 MHz REFERENCE OUTPUT Output Voltage Full VI VCC – 2.6 VCC – 2.5 VCC – 2.4 V Temperature Coefficient Full V 130 ppm/ °C SWITCHING PERFORMANCE Maximum Conversion Rate Full VI 100 MSPS Minimum Conversion Rate Full IV 40 MSPS Encode Pulsewidth High (tEH) +25 °C IV 4.5 13 ns Encode Pulsewidth Low (tEL) +25 °C IV 4.5 13 ns Aperture Delay (tA) +25 °C V 1.1 ns Aperture Uncertainty (Jitter) +25 °C V 3.0 ps, rms Output Valid Time (tV) 3 Full VI 2.0 4.0 ns Output Propagation Delay (tPD) 3 Full VI 5.0 7.0 ns Output Rise Time (tR) Full V 1.4 ns Output Fall Time (tF) Full V 1.0 ns DIGITAL INPUT Logic “1” Voltage Full VI 2.0 V Logic “0” Voltage Full VI 0.8 V Logic “1” Current Full VI ±10 µA Logic “0” Current Full VI –500 µA Input Capacitance +25 °CV 3 pF DIGITAL OUTPUTS Logic “1” Voltage Full VI VDD – 0.5 V Logic “0” Voltage Full VI 0.05 V Output Coding Offset Binary POWER SUPPLY VCC Supply Current (VCC = 5 V) 4 Full VI 85 115 mA VDD Supply Current (VDD = 3.3 V) 4 Full VI 7.5 14 mA Power Dissipation 4 Full VI 450 620 mW Power Supply Sensitivity 5 +25 °C I 0.002 0.010 V/V |
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