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AD9100SD Arkusz danych(PDF) 4 Page - Analog Devices |
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AD9100SD Arkusz danych(HTML) 4 Page - Analog Devices |
4 / 12 page AD9100 REV. B –4– PIN FUNCTION DESCRIPTIONS/CONNECTIONS Pin No. Description Connection 1–VS –5.2 V Power Supply 2, 3, 8, 10–13, 17 GND Common Ground Plane 4VIN Analog Input Signal 5, 7 –VS –5.2 V Power Supply 6, 15 BYPASS 0.1 µF to Ground 9VOUT Track-and-Hold Output 14, 16, 20 +VS +5 V, Power Supply 18 CLK Complement ECL Clock 19 CLK “True” ECL Clock CHIP PAD ASSIGNMENTS GND NC CLOCK NC HOLD CAP (NOTE 3) 2 3 4 5 6 7 8 9 10 11 12 32 14 15 16 17 18 19 20 21 22 23 24 25 26 28 29 30 31 +VS CAP (NOTE 1) CLOCK GND NC BYPASS (NOTE 2) AD9100 TOP VIEW (Not to scale) +VS +VS +VS +VS +VS +VS BYPASS (NOTE 2) +VS +VOUT –VS –VIN –VS –VS CAP (NOTE 1) –VS SIZE = 148 63 15 mils NC = NO CONNECT NOTES: 1. SUPPLY BYPASS CAPACITOR; 0.01 TO 0.1 F CERAMIC CONNECTED TO GROUND. 2. 0.01 F CERAMIC CONNECTED BETWEEN PAD 29 AND PAD 31. 3. HOLD CAPACITOR CONNECTED FROM PAD 4 AND PAD 5 TO GROUND; 10–100pF, NOMINALLY 22pF. DIP PACKAGE DOES NOT REQUIRE EXTERNAL HOLD CAPACITOR. 1 13 27 BYPASS –VS GND +VS CLK –VS –VS +VS BYPASS +VS GND VIN CLK GND GND GND VOUT GND GND GND TOP VIEW (Not to Scale) AD9100 PIN CONFIGURATION 20-Lead Side-Brazed Ceramic DIP TERMINOLOGY Analog Delay is the time required for an analog input signal to propagate from the device input to output. Aperture Delay tells when the input signal is actually sampled. It is the time difference between the analog propagation delay of the front-end buffer and the control switch delay time. (The time from the hold command transition to when the switch is opened.) For the AD9100, this is a positive value which means that the switch delay is longer than the analog delay. Aperture Jitter is the random variation in the aperture delay. This is measured in ps-rms and results in phase noise on the held signal. Droop Rate is the change in output voltage as a function of time (dV/dt). It is measured at the AD9100 output with the device in hold mode and the input held at a specified dc value, the measurement starts immediately after the T/H switches from track to hold. Feedthrough Rejection is the ratio of the input signal to the output signal when in hold mode. This is a mea- sure of how well the switch isolates the input signal from feeding through to the output. Hold-to-Track Switch Delay is the time delay from the track command to the point when the output starts to change and acquire a new signal. Pedestal Offset is the offset voltage step measured immediately after the AD9100 is switched from track to hold with the input held at zero volts. It manifests itself as an added offset during the hold time. Track-to-Hold Settling Time is the time necessary for the track to hold switching transient to settle to within 1 mV of its final value. Track-to-Hold Switching Transient is the maximum peak switch induced transient voltage which appears at the AD9100 output when it is switched from track to hold. |
Podobny numer części - AD9100SD |
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Podobny opis - AD9100SD |
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