Zakładka z wyszukiwarką danych komponentów |
|
AD9101SE Arkusz danych(PDF) 4 Page - Analog Devices |
|
AD9101SE Arkusz danych(HTML) 4 Page - Analog Devices |
4 / 12 page AD9101 –4– REV. 0 Acquisition Time is the amount of time it takes the AD9101 to reacquire the analog input when switching from hold to track mode. The interval starts at the 50% clock transition point and ends when the input signal is reacquired to within a specified error band at the hold capacitor. Aperture Delay establishes when the input signal is actually sampled. It is the time difference between the analog propaga- tion delay of the front-end buffer and the control switch delay time (the time from the hold command transition to when the switch is opened). For the AD9101, this is a negative value, meaning that the analog delay is longer than the switch delay. Aperture Jitter is the random variation in the aperture delay. This is measured in ps-rms and is manifested as phase noise on the held signal. Droop Rate is the change in output voltage as a function of time (dV/dt). It is measured at the AD9101 output with the de- vice in hold mode and the input held at a specified dc value; the measurement starts immediately after the T/H switches from track to hold. Feedthrough Rejection is the ratio of the output signal to the input signal when in hold mode. This is a measure of how well the switch isolates the input signal from feeding through to the output. Hold-to-Track Switch Delay is the time delay from the track command to the point when the output starts to change to ac- quire a new signal level. Pedestal Offset is the offset voltage measured immediately af- ter the AD9101 is switched from track to hold with the input held at zero volts. It manifests itself as a dc offset during the hold time. Sampling Bandwidth is the –3 dB frequency response from the input to the hold capacitor under sampling conditions. It is greater than the tracking bandwidth because it does not include the bandwidth of the output amplifier which is optimized for settling time rather than bandwidth. Track-to-Hold Settling Time is the time necessary for the track to hold switching transient to settle to within 4 mV of its final value. Track-to-Hold Switching Transient is the maximum peak switch induced transient voltage which appears at the AD9101 output when it is switched from track to hold. CLOCK INPUTS +2V 0V -2V ANALOG INPUT (x 4) +2V 0V -2V "1" "0" HOLD TO TRACK SWITCH DELAY TIME (1.5 ns) APERTURE DELAY (–0.25 ns) "TRACK" ACQUISITION TIME (SEE TEXT) VOLTAGE LEVEL HELD "HOLD" SAMPLER OUTPUT SIGNAL (x 4) AND AMPLIFIER OUTPUT SIGNAL OBSERVED AT HOLD CAPACITOR OBSERVED AT AMPLIFIER OUTPUT "HOLD" CLOCK CLOCK CLOCK TRACK TO HOLD SETTLING (4 ns) Timing Diagram (500 ps/div) |
Podobny numer części - AD9101SE |
|
Podobny opis - AD9101SE |
|
|
Link URL |
Polityka prywatności |
ALLDATASHEET.PL |
Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |